######################################################################
#
# MPLAB IDE .dev File Generated by `pic2dev.py'
#
# Device: PIC12C671
# Family: 16xxxx
# Datasheet: 30561
# Programming Spec: 40175
# Date: Tue Apr 30 09:40:15 2013
#
######################################################################


######################################################################
#
# Memory Regions & Other General Device Information
#
######################################################################

vpp (range=12.750-13.250 dflt=13.000)
vdd (range=2.500-5.500 dfltrange=3.000-5.500 nominal=5.000)
pgming (memtech=eprom ovrpgm=3 tries=25)
    wait (pgm=100 cfg=100 userid=100)
HWStackDepth=8
calmem (region=0x3ff-0x3ff)
testmem (region=0x2000-0x217f)
userid (region=0x2000-0x2003)
cfgmem (region=0x2007-0x2007)
pgmmem (region=0x0-0x3ff)
NumBanks=2
MirrorRegs (0xa-0xb 0x8a-0x8b)
MirrorRegs (0x2-0x4 0x82-0x84)
MirrorRegs (0x0-0x0 0x80-0x80)
MirrorRegs (0x70-0x7f 0xf0-0xff)
UnusedRegs (0xc0-0xef)

######################################################################
#
# Special Function Registers
#
######################################################################

sfr (key=INDF addr=0x0 size=1 flags=i access='u u u u u u u u')
    reset (por='--------' mclr='--------')
    bit (names='INDF' width='8')
sfr (key=TMR0 addr=0x1 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='TMR0' width='8')
    stimulus (scl=rwb pcfiles=w regfiles=w type=int)
sfr (key=PCL addr=0x2 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='PCL' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=STATUS addr=0x3 size=1 access='r r rw r r rw rw rw')
    reset (por='00011xxx' mclr='000qquuu')
    bit (names='IRP RP nTO nPD Z DC C' width='1 2 1 1 1 1 1')
sfr (key=FSR addr=0x4 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='FSR' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=w type=int)
sfr (key=GPIO addr=0x5 size=1 access='u u rw rw r rw rw rw')
    reset (por='--xxxxxx' mclr='--uuuuuu')
    bit (names='- - GP5 GP4 GP3 GP2 GP1 GP0' width='1 1 1 1 1 1 1 1')
    bit (tag=scl names='GP' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=rw)
UnusedRegs (0x6-0x9)
sfr (key=PCLATH addr=0xa size=1 access='u u u rw rw rw rw rw')
    reset (por='---00000' mclr='---00000')
    bit (names='- - - PCLATH' width='1 1 1 5')
    stimulus (scl=rwb pcfiles=rw regfiles=w type=int)
sfr (key=INTCON addr=0xb size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='0000000x' mclr='0000000u')
    bit (names='GIE PEIE T0IE INTE GPIE T0IF INTF GPIF' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=PIR1 addr=0xc size=1 access='u rw u u u u u u')
    reset (por='-0------' mclr='-0------')
    bit (names='- ADIF - - - - - -' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
UnusedRegs (0xd-0x1d)
sfr (key=ADRES addr=0x1e size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='ADRES' width='8')
    stimulus (scl=rwb regfiles=r type=int)
sfr (key=ADCON0 addr=0x1f size=1 access='rw rw u rw rw rw u rw')
    reset (por='00000000' mclr='00000000')
    bit (names='ADCS - CHS GO/nDONE - ADON' width='2 1 2 1 1 1')
    bit (tag=scl names='ADCS - CHS GO_nDONE - ADON' width='2 1 2 1 1 1')
    stimulus (scl=rwb regfiles=w)
sfr (key=OPTION_REG addr=0x81 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='11111111' mclr='11111111')
    bit (names='nGPPU INTEDG T0CS T0SE PSA PS' width='1 1 1 1 1 3')
    stimulus (scl=rwb regfiles=w)
sfr (key=TRIS addr=0x85 size=1 access='u u rw rw r rw rw rw')
    reset (por='--111111' mclr='--111111')
    bit (names='- - TRIS5 TRIS4 TRIS3 TRIS2 TRIS1 TRIS0' width='1 1 1 1 1 1 1 1')
    bit (tag=scl names='TRIS' width='8')
    stimulus (scl=rwb regfiles=w)
UnusedRegs (0x86-0x89)
sfr (key=PIE1 addr=0x8c size=1 access='u rw u u u u u u')
    reset (por='-0------' mclr='-0------')
    bit (names='- ADIE - - - - - -' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
UnusedRegs (0x8d-0x8d)
sfr (key=PCON addr=0x8e size=1 access='u u u u u u rw u')
    reset (por='------0-' mclr='------u-')
    bit (names='- - - - - - nPOR -' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb regfiles=w)
sfr (key=OSCCAL addr=0x8f size=1 access='rw rw rw rw rw rw u u')
    reset (por='011100--' mclr='uuuuuu--')
    bit (names='CAL CALFST CALSLW - -' width='4 1 1 1 1')
    stimulus (scl=rwb regfiles=w)
UnusedRegs (0x90-0x9e)
sfr (key=ADCON1 addr=0x9f size=1 access='u u u u u rw rw rw')
    reset (por='-----000' mclr='-----000')
    bit (names='- - - - - PCFG' width='1 1 1 1 1 3')
    stimulus (scl=rwb regfiles=w)

######################################################################
#
# Non Memory-Mapped Registers
#
# (Conditionally visible SFRs appear as NMMRs in the "Special Function
# Registers" section.)
#
######################################################################

HasNMMR=1
nmmr (key=WREG addr=0x0 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
nmmr (key=STKPTR addr=0x1 size=1 flags=h access='rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
NMMRObjSize=2

######################################################################
#
# Configuration Registers
#
######################################################################

cfgbits (key=CONFIG addr=0x2007 unused=0x0)
    field (key=FOSC mask=0x7 desc="Oscillator selection bits")
        setting (req=0x7 value=0x7 desc="EXTRC, Clockout on OSC2")
        setting (req=0x7 value=0x6 desc="EXTRC, OSC2 is I/O")
        setting (req=0x7 value=0x5 desc="INTRC, Clockout on OSC2")
        setting (req=0x7 value=0x4 desc="INTRC, OSC2 is I/O")
        setting (req=0x7 value=0x2 desc="HS oscillator")
        setting (req=0x7 value=0x1 desc="XT oscillator")
        setting (req=0x7 value=0x0 desc="LP oscillator")
    field (key=WDTE mask=0x8 desc="Watchdog Timer Enable bit")
        setting (req=0x8 value=0x8 desc="Enabled")
        setting (req=0x8 value=0x0 desc="Disabled")
    field (key=PWRTE mask=0x10 desc="Power Up Timer")
        setting (req=0x10 value=0x10 desc="Disabled")
        setting (req=0x10 value=0x0 desc="Enabled")
    field (key=CP mask=0x3f60 desc="Code Protection bits")
        setting (req=0x3f60 value=0x3f60 desc="Disabled")
            checksum (type=0x0 protregion=0x0-0x0)
        setting (req=0x3f60 value=0x2a40 desc="Do not use")
        setting (req=0x3f60 value=0x1520 desc="0200h-03FEh code protected")
            checksum (type=0x20 protregion=0x200-0x3fe)
        setting (req=0x3f60 value=0x0 desc="All memory is code protected")
            checksum (type=0x20 protregion=0x0-0x3fe)
    field (key=MCLRE mask=0x80 desc="Master Clear Enable")
        setting (req=0x80 value=0x80 desc="Enabled")
        setting (req=0x80 value=0x0 desc="Disabled")
