######################################################################
#
# MPLAB IDE .dev File Generated by `pic2dev.py'
#
# Device: PIC18F26K22
# Family: 18xxxx
# Datasheet: 41412
# Programming Spec: 41398
# Date: Tue Apr 30 09:43:07 2013
#
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#
# Memory Regions & Other General Device Information
#
######################################################################

vpp (range=7.500-9.000 dflt=9.000)
vdd (range=1.8-5.5 dfltrange=1.8-5.5 nominal=5.0)
pgming (memtech=ee tries=1 panelsize=0x0)
    wait (pgm=1000 eedata=4000 cfg=5000 userid=5000 erase=15000 lvpgm=1000 lverase=1000)
    latches (pgm=64 eedata=2 cfg=2 userid=8 rowerase=64)
HWStackDepth=31
breakpoints (numhwbp=3 datacapture=true idbyte=r)
testmem (region=0x200000-0x20047f)
userid (region=0x200000-0x200007)
cfgmem (region=0x300000-0x30000d)
devid (region=0x3ffffe-0x3fffff idmask=0xffe0 id=0x5440)
eedata (region=0x0-0x3ff)
bkbgvectmem (region=0x200028-0x200037)
pgmmem (region=0x0-0xffff)
NumBanks=16
UnusedBankMask=0x0
AccessBankSplitOffset=0x60

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#
# Special Function Registers
#
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sfr (key=ANSELA addr=0xf38 size=1 access='u u rw u rw rw rw rw')
    reset (por='--1-1111' mclr='--1-1111')
    bit (names='- - ANSA5 - ANSA3 ANSA2 ANSA1 ANSA0' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=ANSELB addr=0xf39 size=1 access='u u rw rw rw rw rw rw')
    reset (por='--111111' mclr='--111111')
    bit (names='- - ANSB5 ANSB4 ANSB3 ANSB2 ANSB1 ANSB0' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=ANSELC addr=0xf3a size=1 access='rw rw rw rw rw rw u u')
    reset (por='111111--' mclr='111111--')
    bit (names='ANSC7 ANSC6 ANSC5 ANSC4 ANSC3 ANSC2 - -' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
UnusedRegs (0xf3b-0xf3c)
sfr (key=PMD2 addr=0xf3d size=1 access='u u u u rw rw rw rw')
    reset (por='----0000' mclr='----0000')
    bit (names='- - - - CTMUMD CMP2MD CMP1MD ADCMD' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=PMD1 addr=0xf3e size=1 access='rw rw u rw rw rw rw rw')
    reset (por='00-00000' mclr='00-00000')
    bit (names='MSSP2MD MSSP1MD - CCP5MD CCP4MD CCP3MD CCP2MD CCP1MD' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=PMD0 addr=0xf3f size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='UART2MD UART1MD TMR6MD TMR5MD TMR4MD TMR3MD TMR2MD TMR1MD' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=VREFCON2 addr=0xf40 size=1 access='u u u rw rw rw rw rw')
    reset (por='---00000' mclr='---00000')
    bit (names='- - - DACR' width='1 1 1 5')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=VREFCON1 addr=0xf41 size=1 access='rw rw rw u rw rw u rw')
    reset (por='000-00-0' mclr='000-00-0')
    bit (names='DACEN DACLPS DACOE - DACPSS - DACNSS' width='1 1 1 1 2 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=VREFCON0 addr=0xf42 size=1 access='rw r rw rw u u u u')
    reset (por='0001----' mclr='0001----')
    bit (names='FVREN FVRST FVRS - - - -' width='1 1 2 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=CTMUICON addr=0xf43 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='ITRIM IRNG' width='6 2')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=CTMUCONL addr=0xf44 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='EDG2POL EDG2SEL EDG1POL EDG1SEL EDG2STAT EDG1STAT' width='1 2 1 2 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=CTMUCONH addr=0xf45 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='CTMUEN - CTMUSIDL TGEN EDGEN EDGSEQEN IDISSEN CTTRIG' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=SRCON1 addr=0xf46 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='SRSPE SRSCKE SRSC2E SRSC1E SRRPE SRRCKE SRRC2E SRRC1E' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=SRCON0 addr=0xf47 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='SRLEN SRCLK SRQEN SRNQEN SRPS SRPR' width='1 3 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=CCPTMRS1 addr=0xf48 size=1 access='u u u u rw rw rw rw')
    reset (por='----0000' mclr='----0000')
    bit (names='- - - - C5TSEL C4TSEL' width='1 1 1 1 2 2')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=CCPTMRS0 addr=0xf49 size=1 access='rw rw u rw rw u rw rw')
    reset (por='00-00-00' mclr='00-00-00')
    bit (names='C3TSEL - C2TSEL - C1TSEL' width='2 1 2 1 2')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=T6CON addr=0xf4a size=1 access='u rw rw rw rw rw rw rw')
    reset (por='-0000000' mclr='-0000000')
    bit (names='- T6OUTPS TMR6ON T6CKPS0' width='1 4 1 2')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=PR6 addr=0xf4b size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='11111111' mclr='11111111')
    bit (names='PR6' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=TMR6 addr=0xf4c size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='TMR6' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=T5GCON addr=0xf4d size=1 access='rw rw rw rw rw r rw rw')
    reset (por='00000x00' mclr='00000x00')
    bit (names='TMR5GE T5GPOL T5GTM T5GSPM T5GGO_nDONE T5GVAL T5GSS' width='1 1 1 1 1 1 2')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=T5CON addr=0xf4e size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='TMR5CS T5CKPS T5SOSCEN nT5SYNC T5RD16 TMR5ON' width='2 2 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=TMR5 addr=0xf4f size=2 flags=j)
sfr (key=TMR5L addr=0xf4f size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='TMR5L' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=TMR5H addr=0xf50 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='TMR5H' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=T4CON addr=0xf51 size=1 access='u rw rw rw rw rw rw rw')
    reset (por='-0000000' mclr='-0000000')
    bit (names='- T4OUTPS TMR4ON T4CKPS' width='1 4 1 2')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=PR4 addr=0xf52 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='11111111' mclr='11111111')
    bit (names='PR4' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=TMR4 addr=0xf53 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='TMR4' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=CCP5CON addr=0xf54 size=1 access='u u rw rw rw rw rw rw')
    reset (por='--000000' mclr='--000000')
    bit (names='- - DC5B CCP5M' width='1 1 2 4')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=CCPR5 addr=0xf55 size=2 flags=j)
sfr (key=CCPR5L addr=0xf55 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='CCPR5L' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=CCPR5H addr=0xf56 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='CCPR5H' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=CCP4CON addr=0xf57 size=1 access='u u rw rw rw rw rw rw')
    reset (por='--000000' mclr='--000000')
    bit (names='- - DC4B CCP4M' width='1 1 2 4')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=CCPR4 addr=0xf58 size=2 flags=j)
sfr (key=CCPR4L addr=0xf58 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='CCPR4L' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=CCPR4H addr=0xf59 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='CCPR4H' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=PSTR3CON addr=0xf5a size=1 access='u u u rw rw rw rw rw')
    reset (por='---00001' mclr='---00001')
    bit (names='- - - STR3SYNC STR3D STR3C STR3B STR3A' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=ECCP3AS addr=0xf5b size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='CCP3ASE CCP3AS P3SSAC P3SSBD' width='1 3 2 2')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=PWM3CON addr=0xf5c size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='P3RSEN P3DC' width='1 7')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=CCP3CON addr=0xf5d size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='P3M DC3B CCP3M' width='2 2 4')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=CCPR3 addr=0xf5e size=2 flags=j)
sfr (key=CCPR3L addr=0xf5e size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='CCPR3L' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=CCPR3H addr=0xf5f size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='CCPR3H' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=SLRCON addr=0xf60 size=1 access='u u u u u rw rw rw')
    reset (por='-----111' mclr='-----111')
    bit (names='- - - - - SLRC SLRB SLRA' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb regfiles=r)
sfr (key=WPUB addr=0xf61 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='11111111' mclr='11111111')
    bit (names='WPUB7 WPUB6 WPUB5 WPUB4 WPUB3 WPUB2 WPUB1 WPUB0' width='1 1 1 1 1 1 1 1')
    bit (tag=scl names='WPUB' width='8')
sfr (key=IOCB addr=0xf62 size=1 access='rw rw rw rw u u u u')
    reset (por='1111----' mclr='1111----')
    bit (names='IOCB7 IOCB6 IOCB5 IOCB4 - - - -' width='1 1 1 1 1 1 1 1')
sfr (key=PSTR2CON addr=0xf63 size=1 access='u u u rw rw rw rw rw')
    reset (por='---00001' mclr='---00001')
    bit (names='- - - STR2SYNC STR2D STR2C STR2B STR2A' width='1 1 1 1 1 1 1 1')
sfr (key=ECCP2AS addr=0xf64 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='CCP2ASE CCP2AS PSS2AC PSS2BD' width='1 3 2 2')
    stimulus (scl=rwb regfiles=w)
sfr (key=PWM2CON addr=0xf65 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='P2RSEN P2DC' width='1 7')
    stimulus (scl=rwb regfiles=w)
sfr (key=CCP2CON addr=0xf66 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='P2M1 P2M0 DC2B CCP2M' width='1 1 2 4')
    stimulus (scl=rwb regfiles=w)
sfr (key=CCPR2 addr=0xf67 size=2 flags=j)
    bit (names='CCPR2' width='16')
sfr (key=CCPR2L addr=0xf67 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='CCPR2L' width='8')
    stimulus (scl=rwb regfiles=w type=int)
sfr (key=CCPR2H addr=0xf68 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='CCPR2H' width='8')
    stimulus (scl=rwb regfiles=w type=int)
sfr (key=SSP2CON3 addr=0xf69 size=1 access='r rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='ACKTIM PCIE SCIE BOEN SDAHT SBCDE AHEN DHEN' width='1 1 1 1 1 1 1 1')
sfr (key=SSP2MSK addr=0xf6a size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='11111111' mclr='11111111')
    bit (names='MSK7 MSK6 MSK5 MSK4 MSK3 MSK2 MSK1 MSK0' width='1 1 1 1 1 1 1 1')
    bit (tag=scl names='SSP2MSK' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=SSP2CON2 addr=0xf6b size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='GCEN ACKSTAT ACKDT ACKEN RCEN PEN RSEN SEN' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=SSP2CON1 addr=0xf6c size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='WCOL SSPOV SSPEN CKP SSPM' width='1 1 1 1 4')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=SSP2STAT addr=0xf6d size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='SMP CKE D/nA P S R/nW UA BF' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=rw)
sfr (key=SSP2ADD addr=0xf6e size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='SSPADD' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=SSP2BUF addr=0xf6f size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='SSPBUF' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=rw)
sfr (key=BAUDCON2 addr=0xf70 size=1 access='rc r rw rw rw u rw rw')
    reset (por='01x00-00' mclr='01x00-00')
    bit (names='ABDOVF RCIDL DTRXP CKTXP BRG16 - WUE ABDEN' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb regfiles=w)
sfr (key=RCSTA2 addr=0xf71 size=1 access='rw rw rw rw rw r r r')
    reset (por='0000000x' mclr='0000000x')
    bit (names='SPEN RX9 SREN CREN ADDEN FERR OERR RX9D' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb regfiles=w)
sfr (key=TXSTA2 addr=0xf72 size=1 access='rw rw rw rw rw rw r rw')
    reset (por='00000010' mclr='00000010')
    bit (names='CSRC TX9 TXEN SYNC SENDB BRGH TRMT TX9D' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb regfiles=w)
sfr (key=TXREG2 addr=0xf73 size=1 access='w w w w w w w w')
    reset (por='00000000' mclr='00000000')
    bit (names='TX2REG' width='8')
    stimulus (scl=rwb regfiles=w)
sfr (key=RCREG2 addr=0xf74 size=1 access='r r r r r r r r')
    reset (por='00000000' mclr='00000000')
    bit (names='RC2REG' width='8')
    stimulus (scl=rb regfiles=rp)
sfr (key=SPBRG2 addr=0xf75 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='SP2BRG' width='8')
    stimulus (scl=rwb regfiles=w)
sfr (key=SPBRGH2 addr=0xf76 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='SP2BRGH' width='8')
    stimulus (scl=rwb regfiles=w)
sfr (key=CM2CON1 addr=0xf77 size=1 access='r r rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='MC1OUT MC2OUT C1RSEL C2RSEL C1HYS C2HYS C1SYNC C2SYNC' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb regfiles=w)
sfr (key=CM2CON0 addr=0xf78 size=1 access='rw r rw rw rw rw rw rw')
    reset (por='00001000' mclr='00001000')
    bit (names='C2ON C2OUT C2OE C2POL C2SP C2R C2CH' width='1 1 1 1 1 1 2')
    stimulus (scl=rwb regfiles=w)
sfr (key=CM1CON0 addr=0xf79 size=1 access='rw r rw rw rw rw rw rw')
    reset (por='00001000' mclr='00001000')
    bit (names='C1ON C1OUT C1OE C1POL C1SP C1R C1CH' width='1 1 1 1 1 1 2')
    stimulus (scl=rwb regfiles=w)
sfr (key=PIE4 addr=0xf7a size=1 access='u u u u u rw rw rw')
    reset (por='-----000' mclr='-----000')
    bit (names='- - - - - CCP5IE CCP4IE CCP3IE' width='1 1 1 1 1 1 1 1')
sfr (key=PIR4 addr=0xf7b size=1 access='u u u u u rw rw rw')
    reset (por='-----000' mclr='-----000')
    bit (names='- - - - - CCP5IF CCP4IF CCP3IF' width='1 1 1 1 1 1 1 1')
sfr (key=IPR4 addr=0xf7c size=1 access='u u u u u rw rw rw')
    reset (por='-----000' mclr='-----000')
    bit (names='- - - - - CCP5IP CCP4IP CCP3IP' width='1 1 1 1 1 1 1 1')
sfr (key=PIE5 addr=0xf7d size=1 access='u u u u u rw rw rw')
    reset (por='-----000' mclr='-----000')
    bit (names='- - - - - TMR6IE TMR5IE TMR4IE' width='1 1 1 1 1 1 1 1')
sfr (key=PIR5 addr=0xf7e size=1 access='u u u u u rw rw rw')
    reset (por='-----111' mclr='-----111')
    bit (names='- - - - - TMR6IF TMR5IF TMR4IF' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb regfiles=r)
sfr (key=IPR5 addr=0xf7f size=1 access='u u u u u rw rw rw')
    reset (por='-----111' mclr='-----111')
    bit (names='- - - - - TMR6IP TMR5IP TMR4IP' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb regfiles=r)
sfr (key=PORTA addr=0xf80 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xx0x0000' mclr='uu0u0000')
    bit (names='RA7 RA6 RA5 RA4 RA3 RA2 RA1 RA0' width='1 1 1 1 1 1 1 1')
    bit (tag=scl names='RA' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=rw)
sfr (key=PORTB addr=0xf81 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxx00000' mclr='uuu00000')
    bit (names='RB7 RB6 RB5 RB4 RB3 RB2 RB1 RB0' width='1 1 1 1 1 1 1 1')
    bit (tag=scl names='RB' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=rw)
sfr (key=PORTC addr=0xf82 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='000000xx' mclr='000000uu')
    bit (names='RC7 RC6 RC5 RC4 RC3 RC2 RC1 RC0' width='1 1 1 1 1 1 1 1')
    bit (tag=scl names='RC' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=rw)
UnusedRegs (0xf83-0xf83)
sfr (key=PORTE addr=0xf84 size=1 access='u u u u r u u u')
    reset (por='----x---' mclr='----u---')
    bit (names='- - - - RE3 - - -' width='1 1 1 1 1 1 1 1')
    bit (tag=scl names='RE' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=rw)
UnusedRegs (0xf85-0xf88)
sfr (key=LATA addr=0xf89 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='LATA7 LATA6 LATA5 LATA4 LATA3 LATA2 LATA1 LATA0' width='1 1 1 1 1 1 1 1')
    bit (tag=scl names='LATA' width='8')
    stimulus (scl=rwb regfiles=w)
sfr (key=LATB addr=0xf8a size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='LATB7 LATB6 LATB5 LATB4 LATB3 LATB2 LATB1 LATB0' width='1 1 1 1 1 1 1 1')
    bit (tag=scl names='LATB' width='8')
    stimulus (scl=rwb regfiles=w)
sfr (key=LATC addr=0xf8b size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='LATC7 LATC6 LATC5 LATC4 LATC3 LATC2 LATC1 LATC0' width='1 1 1 1 1 1 1 1')
    bit (tag=scl names='LATC' width='8')
    stimulus (scl=rwb regfiles=w)
UnusedRegs (0xf8c-0xf91)
sfr (key=TRISA addr=0xf92 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='11111111' mclr='11111111')
    bit (names='TRISA7 TRISA6 TRISA5 TRISA4 TRISA3 TRISA2 TRISA1 TRISA0' width='1 1 1 1 1 1 1 1')
    bit (tag=scl names='TRISA' width='8')
    stimulus (scl=rwb regfiles=w)
sfr (key=TRISB addr=0xf93 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='11111111' mclr='11111111')
    bit (names='TRISB7 TRISB6 TRISB5 TRISB4 TRISB3 TRISB2 TRISB1 TRISB0' width='1 1 1 1 1 1 1 1')
    bit (tag=scl names='TRISB' width='8')
    stimulus (scl=rwb regfiles=w)
sfr (key=TRISC addr=0xf94 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='11111111' mclr='11111111')
    bit (names='TRISC7 TRISC6 TRISC5 TRISC4 TRISC3 TRISC2 TRISC1 TRISC0' width='1 1 1 1 1 1 1 1')
    bit (tag=scl names='TRISC' width='8')
    stimulus (scl=rwb regfiles=w)
UnusedRegs (0xf95-0xf95)
sfr (key=TRISE addr=0xf96 size=1 access='rw u u u u u u u')
    reset (por='1-------' mclr='1-------')
    bit (names='WPUE3 - - - - - - -' width='1 1 1 1 1 1 1 1')
UnusedRegs (0xf97-0xf9a)
sfr (key=OSCTUNE addr=0xf9b size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00xxxxxx' mclr='0-xxxxxx')
    bit (names='INTSRC PLLEN TUN' width='1 1 6')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=HLVDCON addr=0xf9c size=1 access='rw r r rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='VDIRMAG BGVST IRVST HLVDEN HLVDL' width='1 1 1 1 4')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=PIE1 addr=0xf9d size=1 access='u rw rw rw rw rw rw rw')
    reset (por='-0000000' mclr='-0000000')
    bit (names='- ADIE RC1IE TX1IE SSP1IE CCP1IE TMR2IE TMR1IE' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=PIR1 addr=0xf9e size=1 access='u rw r r rw rw rw rw')
    reset (por='-0000000' mclr='-0000000')
    bit (names='- ADIF RC1IF TX1IF SSP1IF CCP1IF TMR2IF TMR1IF' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=IPR1 addr=0xf9f size=1 access='u rw rw rw rw rw rw rw')
    reset (por='-1111111' mclr='-1111111')
    bit (names='- ADIP RC1IP TX1IP SSP1IP CCP1IP TMR2IP TMR1IP' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=PIE2 addr=0xfa0 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='OSCFIE C1IE C2IE EEIE BCL1IE HLVDIE TMR3IE CCP2IE' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=PIR2 addr=0xfa1 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='OSCFIF C1IF C2IF EEIF BCL1IF HLVDIF TMR3IF CCP2IF' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=IPR2 addr=0xfa2 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='11111111' mclr='11111111')
    bit (names='OSCFIP C1IP C2IP EEIP BCL1IP HLVDIP TMR3IP CCP2IP' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=PIE3 addr=0xfa3 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='SSP2IE BCL2IE RC2IE TX2IE CTMUIE TMR5GIE TMR3GIE TMR1GIE' width='1 1 1 1 1 1 1 1')
sfr (key=PIR3 addr=0xfa4 size=1 access='rw rw r r rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='SSP2IF BCL2IF RC2IF TX2IF CTMUIF TMR5GIF TMR3GIF TMR1GIF' width='1 1 1 1 1 1 1 1')
sfr (key=IPR3 addr=0xfa5 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='SSP2IP BCL2IP RC2IP TX2IP CTMUIP TMR5GIP TMR3GIP TMR1GIP' width='1 1 1 1 1 1 1 1')
sfr (key=EECON1 addr=0xfa6 size=1 access='rw rw u rw rw rw rs rs')
    reset (por='xx-0x000' mclr='uu-0u000')
    bit (names='EEPGD CFGS - FREE WRERR WREN WR RD' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=EECON2 addr=0xfa7 size=1 access='w w w w w w w w')
    reset (por='--------' mclr='--------')
    bit (names='EECON2' width='8')
sfr (key=EEDATA addr=0xfa8 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='EEDATA' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=rw)
sfr (key=EEADR addr=0xfa9 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='EEADR' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=EEADRH addr=0xfaa size=1 access='u u u u u u rw rw')
    reset (por='------00' mclr='------00')
    bit (names='- - - - - - EEADRH' width='1 1 1 1 1 1 2')
sfr (key=RCSTA1 addr=0xfab size=1 access='rw rw rw rw rw r r r')
    reset (por='0000000x' mclr='0000000x')
    bit (names='SPEN RX9 SREN CREN ADDEN FERR OERR RX9D' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb regfiles=w)
sfr (key=TXSTA1 addr=0xfac size=1 access='rw rw rw rw rw rw r rw')
    reset (por='00000010' mclr='00000010')
    bit (names='CSRC TX9 TXEN SYNC SENDB BRGH TRMT TX9D' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb regfiles=w)
sfr (key=TXREG1 addr=0xfad size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='TX1REG' width='8')
    stimulus (scl=rwb regfiles=w)
sfr (key=RCREG1 addr=0xfae size=1 access='r r r r r r r r')
    reset (por='00000000' mclr='00000000')
    bit (names='RC1REG' width='8')
    stimulus (scl=rb regfiles=rp)
sfr (key=SPBRG1 addr=0xfaf size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='SP1BRG' width='8')
    stimulus (scl=rwb regfiles=w)
sfr (key=SPBRGH1 addr=0xfb0 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='SP1BRGH' width='8')
    stimulus (scl=rwb regfiles=w)
sfr (key=T3CON addr=0xfb1 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='TMR3CS T3CKPS T3SOSCEN nT3SYNC T3RD16 TMR3ON' width='2 2 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=TMR3 addr=0xfb2 size=2 flags=j)
    bit (names='TMR3' width='16')
sfr (key=TMR3L addr=0xfb2 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='TMR3L' width='8')
    stimulus (scl=rwb pcfiles=w regfiles=w type=int)
sfr (key=TMR3H addr=0xfb3 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='TMR3H' width='8')
    stimulus (scl=rwb pcfiles=w regfiles=w type=int)
sfr (key=T3GCON addr=0xfb4 size=1 access='rw rw rw rw rw r rw rw')
    reset (por='00000x00' mclr='00000x00')
    bit (names='TMR3GE T3GPOL T3GTM T3GSPM T3GGO/nDONE T3GVAL T3GSS' width='1 1 1 1 1 1 2')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
UnusedRegs (0xfb5-0xfb5)
sfr (key=ECCP1AS addr=0xfb6 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='CCP1ASE CCP1AS PSS1AC PSS1BD' width='1 3 2 2')
    stimulus (scl=rwb regfiles=w)
sfr (key=PWM1CON addr=0xfb7 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='P1RSEN P1DC' width='1 7')
    stimulus (scl=rwb regfiles=w)
sfr (key=BAUDCON1 addr=0xfb8 size=1 access='rw r rw rw rw u rw rw')
    reset (por='01000-00' mclr='01000-00')
    bit (names='ABDOVF RCIDL DTRXP CKTXP BRG16 - WUE ABDEN' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb regfiles=w)
sfr (key=PSTR1CON addr=0xfb9 size=1 access='u u u rw rw rw rw rw')
    reset (por='---00001' mclr='---00001')
    bit (names='- - - STR1SYNC STR1D STR1C STR1B STR1A' width='1 1 1 1 1 1 1 1')
sfr (key=T2CON addr=0xfba size=1 access='u rw rw rw rw rw rw rw')
    reset (por='-0000000' mclr='-0000000')
    bit (names='- T2OUTPS TMR2ON T2CKPS' width='1 4 1 2')
    stimulus (scl=rwb regfiles=w)
sfr (key=PR2 addr=0xfbb size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='11111111' mclr='11111111')
    bit (names='PR2' width='8')
    stimulus (scl=rwb regfiles=w type=int)
sfr (key=TMR2 addr=0xfbc size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='TMR2' width='8')
    stimulus (scl=rwb pcfiles=w regfiles=w type=int)
sfr (key=CCP1CON addr=0xfbd size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='P1M DC1B CCP1M' width='2 2 4')
    stimulus (scl=rwb regfiles=w)
sfr (key=CCPR1 addr=0xfbe size=2 flags=j)
    bit (names='CCPR1' width='16')
sfr (key=CCPR1L addr=0xfbe size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='CCPR1L' width='8')
    stimulus (scl=rwb regfiles=w type=int)
sfr (key=CCPR1H addr=0xfbf size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='CCPR1H' width='8')
    stimulus (scl=rwb regfiles=w type=int)
sfr (key=ADCON2 addr=0xfc0 size=1 access='rw u rw rw rw rw rw rw')
    reset (por='0-000000' mclr='0-000000')
    bit (names='ADFM - ACQT ADCS' width='1 1 3 3')
    stimulus (scl=rwb regfiles=w)
sfr (key=ADCON1 addr=0xfc1 size=1 access='rw u u u rw rw rw rw')
    reset (por='0---0000' mclr='0---0000')
    bit (names='TRIGSEL - - - PVCFG NVCFG' width='1 1 1 1 2 2')
    stimulus (scl=rwb regfiles=w)
sfr (key=ADCON0 addr=0xfc2 size=1 access='u rw rw rw rw rw rw rw')
    reset (por='-0000000' mclr='-0000000')
    bit (names='- CHS GO/nDONE ADON' width='1 5 1 1')
    bit (tag=scl names='- CHS4 CHS3 CHS2 CHS1 CHS0 GO -' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb regfiles=w)
sfr (key=ADRES addr=0xfc3 size=2 flags=j)
    bit (names='ADRES' width='16')
sfr (key=ADRESL addr=0xfc3 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='ADRESL' width='8')
    stimulus (scl=rwb regfiles=r type=int)
sfr (key=ADRESH addr=0xfc4 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='ADRESH' width='8')
    stimulus (scl=rwb regfiles=w type=int)
sfr (key=SSP1CON2 addr=0xfc5 size=1 access='rw r rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='GCEN ACKSTAT ACKDT ACKEN RCEN PEN RSEN SEN' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=SSP1CON1 addr=0xfc6 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='WCOL SSPOV SSPEN CKP SSPM' width='1 1 1 1 4')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=SSP1STAT addr=0xfc7 size=1 access='rw rw r r r r r r')
    reset (por='00000000' mclr='00000000')
    bit (names='SMP CKE D/nA P S R/nW UA BF' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=rw)
sfr (key=SSP1ADD addr=0xfc8 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='SSPADD' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=SSP1BUF addr=0xfc9 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='SSPBUF' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=rw)
sfr (key=SSP1MSK addr=0xfca size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='11111111' mclr='11111111')
    bit (names='MSK7 MSK6 MSK5 MSK4 MSK3 MSK2 MSK1 MSK0' width='1 1 1 1 1 1 1 1')
    bit (tag=scl names='MSK' width='8')
    bit (tag=scl names='SSP1MSK' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=SSP1CON3 addr=0xfcb size=1 access='r rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='ACKTIM PCIE SCIE BOEN SDAHT SBCDE AHEN DHEN' width='1 1 1 1 1 1 1 1')
sfr (key=T1GCON addr=0xfcc size=1 access='rw rw rw rw rw r rw rw')
    reset (por='00000x00' mclr='00000x00')
    bit (names='TMR1GE T1GPOL T1GTM T1GSPM T1GGO_nDONE T1GVAL T1GSS' width='1 1 1 1 1 1 2')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=T1CON addr=0xfcd size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='uuuuuuuu')
    bit (names='TMR1CS T1CKPS T1SOSCEN nT1SYNC T1RD16 TMR1ON' width='2 2 1 1 1 1')
    stimulus (scl=rwb regfiles=w)
sfr (key=TMR1 addr=0xfce size=2 flags=j)
    bit (names='TMR1' width='16')
sfr (key=TMR1L addr=0xfce size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='TMR1L' width='8')
    stimulus (scl=rwb pcfiles=w regfiles=w type=int)
sfr (key=TMR1H addr=0xfcf size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='TMR1H' width='8')
    stimulus (scl=rwb pcfiles=w regfiles=w type=int)
sfr (key=RCON addr=0xfd0 size=1 access='rw rw u rw rw rw rw rw')
    reset (por='01-11100' mclr='01-uqquu')
    bit (names='IPEN SBOREN - nRI nTO nPD nPOR nBOR' width='1 1 1 1 1 1 1 1')
    stimulus (scl=r pcfiles=rw regfiles=w)
sfr (key=WDTCON addr=0xfd1 size=1 access='u u u u u u u rw')
    reset (por='-------0' mclr='-------0')
    bit (names='- - - - - - - SWDTEN' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=OSCCON2 addr=0xfd2 size=1 access='r r u rw rw rw r r')
    reset (por='00-001x0' mclr='00-0u1x0')
    bit (names='PLLRDY SOSCRUN - MFIOSEL SOSCGO PRISD MFIOFS LFIOFS' width='1 1 1 1 1 1 1 1')
sfr (key=OSCCON addr=0xfd3 size=1 access='rw rw rw rw r r rw rw')
    reset (por='0110q000' mclr='0110q000')
    bit (names='IDLEN IRCF OSTS HFIOFS SCS' width='1 3 1 1 2')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
UnusedRegs (0xfd4-0xfd4)
sfr (key=T0CON addr=0xfd5 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='11111111' mclr='11111111')
    bit (names='TMR0ON T08BIT T0CS T0SE PSA T0PS' width='1 1 1 1 1 3')
    stimulus (scl=rwb regfiles=w)
sfr (key=TMR0 addr=0xfd6 size=2 flags=j)
    bit (names='TMR0' width='16')
sfr (key=TMR0L addr=0xfd6 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='TMR0L' width='8')
    stimulus (scl=rwb pcfiles=w regfiles=w type=int)
sfr (key=TMR0H addr=0xfd7 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='TMR0H' width='8')
    stimulus (scl=rwb pcfiles=w regfiles=w type=int)
sfr (key=STATUS addr=0xfd8 size=1 access='u u u rw rw rw rw rw')
    reset (por='---xxxxx' mclr='---uuuuu')
    bit (names='- - - N OV Z DC C' width='1 1 1 1 1 1 1 1')
sfr (key=FSR2 addr=0xfd9 size=2 flags=j)
    bit (names='- - - - FSR2' width='1 1 1 1 12')
sfr (key=FSR2L addr=0xfd9 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='FSR2L' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=FSR2H addr=0xfda size=1 access='u u u u rw rw rw rw')
    reset (por='----0000' mclr='----0000')
    bit (names='- - - - FSR2H' width='1 1 1 1 4')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=PLUSW2 addr=0xfdb size=1 flags=i access='u u u u u u u u')
    reset (por='--------' mclr='--------')
    bit (names='PLUSW2' width='8')
sfr (key=PREINC2 addr=0xfdc size=1 flags=i access='u u u u u u u u')
    reset (por='--------' mclr='--------')
    bit (names='PREINC2' width='8')
sfr (key=POSTDEC2 addr=0xfdd size=1 flags=i access='u u u u u u u u')
    reset (por='--------' mclr='--------')
    bit (names='POSTDEC2' width='8')
sfr (key=POSTINC2 addr=0xfde size=1 flags=i access='u u u u u u u u')
    reset (por='--------' mclr='--------')
    bit (names='POSTINC2' width='8')
sfr (key=INDF2 addr=0xfdf size=1 flags=i access='u u u u u u u u')
    reset (por='--------' mclr='--------')
    bit (names='INDF2' width='8')
sfr (key=BSR addr=0xfe0 size=1 access='u u u u rw rw rw rw')
    reset (por='----0000' mclr='----0000')
    bit (names='- - - - BSR' width='1 1 1 1 4')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=FSR1 addr=0xfe1 size=2 flags=j)
    bit (names='- - - - FSR1' width='1 1 1 1 12')
sfr (key=FSR1L addr=0xfe1 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='FSR1L' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=FSR1H addr=0xfe2 size=1 access='u u u u rw rw rw rw')
    reset (por='----0000' mclr='----uuuu')
    bit (names='- - - - FSR1H' width='1 1 1 1 4')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=PLUSW1 addr=0xfe3 size=1 flags=i access='u u u u u u u u')
    reset (por='--------' mclr='--------')
    bit (names='PLUSW1' width='8')
sfr (key=PREINC1 addr=0xfe4 size=1 flags=i access='u u u u u u u u')
    reset (por='--------' mclr='--------')
    bit (names='PREINC1' width='8')
sfr (key=POSTDEC1 addr=0xfe5 size=1 flags=i access='u u u u u u u u')
    reset (por='--------' mclr='--------')
    bit (names='POSTDEC1' width='8')
sfr (key=POSTINC1 addr=0xfe6 size=1 flags=i access='u u u u u u u u')
    reset (por='--------' mclr='--------')
    bit (names='POSTINC1' width='8')
sfr (key=INDF1 addr=0xfe7 size=1 flags=i access='u u u u u u u u')
    reset (por='--------' mclr='--------')
    bit (names='INDF1' width='8')
sfr (key=WREG addr=0xfe8 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='WREG' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=w type=int)
sfr (key=FSR0 addr=0xfe9 size=2 flags=j)
    bit (names='- - - - FSR0' width='1 1 1 1 12')
sfr (key=FSR0L addr=0xfe9 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='FSR0L' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=FSR0H addr=0xfea size=1 access='u u u u rw rw rw rw')
    reset (por='----0000' mclr='----uuuu')
    bit (names='- - - - FSR0H' width='1 1 1 1 4')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=PLUSW0 addr=0xfeb size=1 flags=i access='u u u u u u u u')
    reset (por='--------' mclr='--------')
    bit (names='PLUSW0' width='8')
sfr (key=PREINC0 addr=0xfec size=1 flags=i access='u u u u u u u u')
    reset (por='--------' mclr='--------')
    bit (names='PREINC0' width='8')
sfr (key=POSTDEC0 addr=0xfed size=1 flags=i access='u u u u u u u u')
    reset (por='--------' mclr='--------')
    bit (names='POSTDEC0' width='8')
sfr (key=POSTINC0 addr=0xfee size=1 flags=i access='u u u u u u u u')
    reset (por='--------' mclr='--------')
    bit (names='POSTINC0' width='8')
sfr (key=INDF0 addr=0xfef size=1 flags=i access='u u u u u u u u')
    reset (por='--------' mclr='--------')
    bit (names='INDF0' width='8')
sfr (key=INTCON3 addr=0xff0 size=1 access='rw rw u rw rw u rw rw')
    reset (por='11-00-00' mclr='11-00-00')
    bit (names='INT2IP INT1IP - INT2IE INT1IE - INT2IF INT1IF' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=INTCON2 addr=0xff1 size=1 access='rw rw rw rw u rw u rw')
    reset (por='1111-1-1' mclr='1111-1-1')
    bit (names='nRBPU INTEDG0 INTEDG1 INTEDG2 - TMR0IP - RBIP' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=INTCON addr=0xff2 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='0000000x' mclr='0000000u')
    bit (names='GIE/GIEH PEIE/GIEL TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF' width='1 1 1 1 1 1 1 1')
    # NOTE: When IPEN (bit 7) in the RCON register is 0 use the following bit names
    qbit (names='GIE PEIE T0IE INT0E - T0IF INT0F -' width='1 1 1 1 1 1 1 1')
    # NOTE: When IPEN (bit 7) in the RCON register is 1 use the following bit names
    qbit (names='GIEH GIEL - - - - - -' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=PROD addr=0xff3 size=2 flags=j)
    bit (names='PROD' width='16')
sfr (key=PRODL addr=0xff3 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='PRODL' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=PRODH addr=0xff4 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='PRODH' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=TABLAT addr=0xff5 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='TABLAT' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=TBLPTR addr=0xff6 size=3 flags=j)
    bit (names='- - ACSS TBLPTR' width='1 1 1 21')
sfr (key=TBLPTRL addr=0xff6 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='TBLPTRL' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=TBLPTRH addr=0xff7 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='TBLPTRH' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=TBLPTRU addr=0xff8 size=1 access='u u rw rw rw rw rw rw')
    reset (por='--xxxxxx' mclr='--xxxxxx')
    bit (names='- - TBLPTRU' width='1 1 6')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=PCLAT addr=0xff9 size=3 flags=j)
    bit (names='- - - PCLAT' width='1 1 1 21')
sfr (key=PCL addr=0xff9 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='PCL' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=PCLATH addr=0xffa size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='PCH' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=PCLATU addr=0xffb size=1 access='u u u rw rw rw rw rw')
    reset (por='---00000' mclr='---00000')
    bit (names='- - - PCU' width='1 1 1 5')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=STKPTR addr=0xffc size=1 access='rc rc u rw rw rw rw rw')
    reset (por='00-00000' mclr='00-00000')
    bit (names='STKFUL STKUNF - STKPTR' width='1 1 1 5')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=TOS addr=0xffd size=3 flags=j)
    bit (names='- - - TOS' width='1 1 1 21')
sfr (key=TOSL addr=0xffd size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='TOSL' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=TOSH addr=0xffe size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='TOSH' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=TOSU addr=0xfff size=1 access='u u u rw rw rw rw rw')
    reset (por='---00000' mclr='---00000')
    bit (names='- - - TOSU' width='1 1 1 5')
    stimulus (scl=rwb pcfiles=rw regfiles=w)

######################################################################
#
# Non Memory-Mapped Registers
#
# (Conditionally visible SFRs appear as NMMRs in the "Special Function
# Registers" section.)
#
######################################################################

HasNMMR=1
nmmr (key=TMR0_Internal addr=0xa size=2 access='r r r r r r r r r r r r r r r r')
    reset (por='xxxxxxxxxxxxxxxx' mclr='uuuuuuuuuuuuuuuu')
    bit (names='InternalTMR' width='16')
nmmr (key=TMR0_Prescale addr=0x12 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='InternalPS' width='8')
nmmr (key=TMR1_Internal addr=0xc size=2 access='r r r r r r r r r r r r r r r r')
    reset (por='xxxxxxxxxxxxxxxx' mclr='uuuuuuuuuuuuuuuu')
    bit (names='InternalTMR' width='16')
nmmr (key=TMR1_Prescale addr=0x13 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='InternalPS' width='8')
nmmr (key=TMR2_Prescale addr=0x14 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='InternalPS' width='8')
nmmr (key=TMR3_Internal addr=0xe size=2 access='r r r r r r r r r r r r r r r r')
    reset (por='xxxxxxxxxxxxxxxx' mclr='uuuuuuuuuuuuuuuu')
    bit (names='InternalTMR' width='16')
nmmr (key=TMR3_Prescale addr=0x15 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='InternalPS' width='8')
NMMRObjSize=7

######################################################################
#
# Configuration Registers
#
######################################################################

cfgbits (key=CONFIG1H addr=0x300001 unused=0x0)
    field (key=FOSC mask=0xf desc="Oscillator Selection bits" init=0x5)
        setting (req=0xe value=0xe desc="111X External RC oscillator, CLKOUT function on RA6" freqmin=0 freqmax=4000000)
        setting (req=0xf value=0xd desc="EC oscillator (low power, <500 kHz)" freqmin=0 freqmax=4000000)
        setting (req=0xf value=0xc desc="EC oscillator, CLKOUT function on OSC2 (low power, <500 kHz)" freqmin=0 freqmax=4000000)
        setting (req=0xf value=0xb desc="EC oscillator (medium power, 500 kHz-16 MHz)" freqmin=4000000 freqmax=16000000)
        setting (req=0xf value=0xa desc="EC oscillator, CLKOUT function on OSC2 (medium power, 500 kHz-16 MHz)" freqmin=4000000 freqmax=16000000)
        setting (req=0xf value=0x9 desc="Internal oscillator block, CLKOUT function on OSC2" freqmin=31250 freqmax=16000000)
        setting (req=0xf value=0x8 desc="Internal oscillator block" freqmin=31250 freqmax=16000000)
        setting (req=0xf value=0x7 desc="External RC oscillator" freqmin=0 freqmax=4000000)
        setting (req=0xf value=0x6 desc="External RC oscillator, CLKOUT function on OSC2" freqmin=0 freqmax=4000000)
        setting (req=0xf value=0x5 desc="EC oscillator (high power, >16 MHz)" freqmin=16000000 freqmax=64000000)
        setting (req=0xf value=0x4 desc="EC oscillator, CLKOUT function on OSC2 (high power, >16 MHz)" freqmin=16000000 freqmax=64000000)
        setting (req=0xf value=0x3 desc="HS oscillator (medium power 4-16 MHz)" freqmin=4000000 freqmax=16000000)
        setting (req=0xf value=0x2 desc="HS oscillator (high power > 16 MHz)" freqmin=16000000 freqmax=25000000)
        setting (req=0xf value=0x1 desc="XT oscillator" freqmin=100000 freqmax=4000000)
        setting (req=0xf value=0x0 desc="LP oscillator" freqmin=32768 freqmax=32768)
    field (key=PLLCFG mask=0x10 desc="4X PLL Enable" init=0x0)
        setting (req=0x10 value=0x0 desc="Disabled")
        setting (req=0x10 value=0x10 desc="Enabled")
    field (key=PRICLKEN mask=0x20 desc="Primary clock enable bit")
        setting (req=0x20 value=0x0 desc="Disabled")
        setting (req=0x20 value=0x20 desc="Enabled")
    field (key=FCMEN mask=0x40 desc="Fail-Safe Clock Monitor Enable bit" init=0x0)
        setting (req=0x40 value=0x0 desc="Disabled")
        setting (req=0x40 value=0x40 desc="Enabled")
    field (key=IESO mask=0x80 desc="Internal/External Oscillator Switchover bit" init=0x0)
        setting (req=0x80 value=0x0 desc="Disabled")
        setting (req=0x80 value=0x80 desc="Enabled")
cfgbits (key=CONFIG2L addr=0x300002 unused=0x0)
    field (key=PWRTEN mask=0x1 desc="Power-up Timer Enable bit")
        setting (req=0x1 value=0x1 desc="Disabled")
        setting (req=0x1 value=0x0 desc="Enabled")
    field (key=BOREN mask=0x6 desc="Brown-out Reset Enable bits")
        setting (req=0x6 value=0x6 desc="Brown-out Reset enabled in hardware only (SBOREN is disabled)")
        setting (req=0x6 value=0x4 desc="Brown-out Reset enabled in hardware only and disabled in Sleep mode (SBOREN is disabled)")
        setting (req=0x6 value=0x2 desc="Enabled")
        setting (req=0x6 value=0x0 desc="Disabled")
    field (key=BORV mask=0x18 desc="Brown Out Reset Voltage bits")
        setting (req=0x18 value=0x18 desc="VBOR set to 1.90 V nominal")
        setting (req=0x18 value=0x10 desc="VBOR set to 2.20 V nominal")
        setting (req=0x18 value=0x8 desc="VBOR set to 2.50 V nominal")
        setting (req=0x18 value=0x0 desc="VBOR set to 2.85 V nominal")
cfgbits (key=CONFIG2H addr=0x300003 unused=0x0)
    field (key=WDTEN mask=0x3 desc="Watchdog Timer Enable bits" min=4)
        setting (req=0x3 value=0x3 desc="Enabled")
        setting (req=0x3 value=0x2 desc="WDT is controlled by SWDTEN bit of the WDTCON register")
        setting (req=0x3 value=0x1 desc="WDT is disabled in sleep, otherwise enabled. SWDTEN bit has no effect")
        setting (req=0x3 value=0x0 desc="Disabled")
    field (key=WDTPS mask=0x3c desc="Watchdog Timer Postscale Select bits")
        setting (req=0x3c value=0x3c desc="1:32768")
        setting (req=0x3c value=0x38 desc="1:16384")
        setting (req=0x3c value=0x34 desc="1:8192")
        setting (req=0x3c value=0x30 desc="1:4096")
        setting (req=0x3c value=0x2c desc="1:2048")
        setting (req=0x3c value=0x28 desc="1:1024")
        setting (req=0x3c value=0x24 desc="1:512")
        setting (req=0x3c value=0x20 desc="1:256")
        setting (req=0x3c value=0x1c desc="1:128")
        setting (req=0x3c value=0x18 desc="1:64")
        setting (req=0x3c value=0x14 desc="1:32")
        setting (req=0x3c value=0x10 desc="1:16")
        setting (req=0x3c value=0xc desc="1:8")
        setting (req=0x3c value=0x8 desc="1:4")
        setting (req=0x3c value=0x4 desc="1:2")
        setting (req=0x3c value=0x0 desc="1:1")
cfgbits (key=CONFIG3H addr=0x300005 unused=0x0)
    field (key=CCP2MUX mask=0x1 desc="CCP2 MUX bit")
        setting (req=0x1 value=0x1 desc="CCP2 input/output is multiplexed with RC1")
        setting (req=0x1 value=0x0 desc="CCP2 input/output is multiplexed with RB3")
    field (key=PBADEN mask=0x2 desc="PORTB A/D Enable bit")
        setting (req=0x2 value=0x2 desc="Enabled")
        setting (req=0x2 value=0x0 desc="Disabled")
    field (key=CCP3MX mask=0x4 desc="P3A/CCP3 Mux bit")
        setting (req=0x4 value=0x4 desc="P3A/CCP3 input/output is multiplexed with RB5")
        setting (req=0x4 value=0x0 desc="P3A/CCP3 input/output is mulitplexed with RC6")
    field (key=HFOFST mask=0x8 desc="HFINTOSC Fast Start-up")
        setting (req=0x8 value=0x8 desc="Enabled")
        setting (req=0x8 value=0x0 desc="Disabled")
    field (key=T3CMX mask=0x10 desc="Timer3 Clock input mux bit")
        setting (req=0x10 value=0x10 desc="T3CKI is on RC0")
        setting (req=0x10 value=0x0 desc="T3CKI is on RB5")
    field (key=P2BMX mask=0x20 desc="ECCP2 B output mux bit")
        setting (req=0x20 value=0x20 desc="P2B is on RB5")
        setting (req=0x20 value=0x0 desc="P2B is on RC0")
    field (key=MCLRE mask=0x80 desc="MCLR Pin Enable bit")
        setting (req=0x80 value=0x80 desc="MCLR pin enabled, RE3 input pin disabled")
        setting (req=0x80 value=0x0 desc="RE3 input pin enabled; MCLR disabled")
cfgbits (key=CONFIG4L addr=0x300006 unused=0x0)
    field (key=STVREN mask=0x1 desc="Stack Full/Underflow Reset Enable bit")
        setting (req=0x1 value=0x1 desc="Enabled")
        setting (req=0x1 value=0x0 desc="Disabled")
    field (key=LVP mask=0x4 desc="Single-Supply ICSP Enable bit")
        setting (req=0x4 value=0x4 desc="Enabled")
        setting (req=0x4 value=0x0 desc="Disabled")
    field (key=XINST mask=0x40 desc="Extended Instruction Set Enable bit" init=0x0)
        setting (req=0x40 value=0x40 desc="Enabled")
        setting (req=0x40 value=0x0 desc="Disabled")
    field (key=DEBUG mask=0x80 desc="Background Debug" flags=h)
        setting (req=0x80 value=0x80 desc="Disabled")
        setting (req=0x80 value=0x0 desc="Enabled")
cfgbits (key=CONFIG5L addr=0x300008 unused=0x0)
    field (key=CP0 mask=0x1 desc="Code Protection Block 0")
        setting (req=0x1 value=0x1 desc="Disabled")
            checksum (type=0x0 protregion=0x0-0x0)
        setting (req=0x1 value=0x0 desc="Enabled")
            checksum (type=0x27 protregion=0x800-0x3fff)
    field (key=CP1 mask=0x2 desc="Code Protection Block 1")
        setting (req=0x2 value=0x2 desc="Disabled")
            checksum (type=0x0 protregion=0x0-0x0)
        setting (req=0x2 value=0x0 desc="Enabled")
            checksum (type=0x27 protregion=0x4000-0x7fff)
    field (key=CP2 mask=0x4 desc="Code Protection Block 2")
        setting (req=0x4 value=0x4 desc="Disabled")
            checksum (type=0x0 protregion=0x0-0x0)
        setting (req=0x4 value=0x0 desc="Enabled")
            checksum (type=0x27 protregion=0x8000-0xbfff)
    field (key=CP3 mask=0x8 desc="Code Protection Block 3")
        setting (req=0x8 value=0x8 desc="Disabled")
            checksum (type=0x0 protregion=0x0-0x0)
        setting (req=0x8 value=0x0 desc="Enabled")
            checksum (type=0x27 protregion=0xc000-0xffff)
cfgbits (key=CONFIG5H addr=0x300009 unused=0x0)
    field (key=CPB mask=0x40 desc="Boot Block Code Protection bit")
        setting (req=0x40 value=0x40 desc="Disabled")
            checksum (type=0x0 protregion=0x0-0x0)
        setting (req=0x40 value=0x0 desc="Enabled")
            checksum (type=0x27 protregion=0x0-0x7ff)
    field (key=CPD mask=0x80 desc="Data EEPROM Code Protection bit")
        setting (req=0x80 value=0x80 desc="Disabled")
        setting (req=0x80 value=0x0 desc="Enabled")
cfgbits (key=CONFIG6L addr=0x30000a unused=0x0)
    field (key=WRT0 mask=0x1 desc="Write Protection Block 0")
        setting (req=0x1 value=0x1 desc="Disabled")
        setting (req=0x1 value=0x0 desc="Enabled")
    field (key=WRT1 mask=0x2 desc="Write Protection Block 1")
        setting (req=0x2 value=0x2 desc="Disabled")
        setting (req=0x2 value=0x0 desc="Enabled")
    field (key=WRT2 mask=0x4 desc="Write Protection Block 2")
        setting (req=0x4 value=0x4 desc="Disabled")
        setting (req=0x4 value=0x0 desc="Enabled")
    field (key=WRT3 mask=0x8 desc="Write Protection Block 3")
        setting (req=0x8 value=0x8 desc="Disabled")
        setting (req=0x8 value=0x0 desc="Enabled")
cfgbits (key=CONFIG6H addr=0x30000b unused=0x0)
    field (key=WRTC mask=0x20 desc="Configuration Register Write Protection bit")
        setting (req=0x20 value=0x20 desc="Disabled")
        setting (req=0x20 value=0x0 desc="Enabled")
    field (key=WRTB mask=0x40 desc="Boot Block Write Protection bit")
        setting (req=0x40 value=0x40 desc="Disabled")
        setting (req=0x40 value=0x0 desc="Enabled")
    field (key=WRTD mask=0x80 desc="Data EEPROM Write Protection bit")
        setting (req=0x80 value=0x80 desc="Disabled")
        setting (req=0x80 value=0x0 desc="Enabled")
cfgbits (key=CONFIG7L addr=0x30000c unused=0x0)
    field (key=EBTR0 mask=0x1 desc="Table Read Protection Block 0")
        setting (req=0x1 value=0x1 desc="Disabled")
        setting (req=0x1 value=0x0 desc="Enabled")
    field (key=EBTR1 mask=0x2 desc="Table Read Protection Block 1")
        setting (req=0x2 value=0x2 desc="Disabled")
        setting (req=0x2 value=0x0 desc="Enabled")
    field (key=EBTR2 mask=0x4 desc="Table Read Protection Block 2")
        setting (req=0x4 value=0x4 desc="Disabled")
        setting (req=0x4 value=0x0 desc="Enabled")
    field (key=EBTR3 mask=0x8 desc="Table Read Protection Block 3")
        setting (req=0x8 value=0x8 desc="Disabled")
        setting (req=0x8 value=0x0 desc="Enabled")
cfgbits (key=CONFIG7H addr=0x30000d unused=0x0)
    field (key=EBTRB mask=0x40 desc="Boot Block Table Read Protection bit")
        setting (req=0x40 value=0x40 desc="Disabled")
        setting (req=0x40 value=0x0 desc="Enabled")
