######################################################################
#
# MPLAB IDE .dev File Generated by `pic2dev.py'
#
# Device: PIC16C924
# Family: 16xxxx
# Datasheet: 30444
# Programming Spec: 30228
# Date: Tue Apr 30 09:40:30 2013
#
######################################################################


######################################################################
#
# Memory Regions & Other General Device Information
#
######################################################################

vpp (range=12.750-13.250 dflt=13.000)
vdd (range=2.500-6.000 dfltrange=4.500-5.500 nominal=5.000)
pgming (memtech=eprom ovrpgm=3 tries=25)
    wait (pgm=100 cfg=100 userid=100)
HWStackDepth=8
HasLCD=0x80
testmem (region=0x2000-0x20ff)
userid (region=0x2000-0x2003)
cfgmem (region=0x2007-0x2007)
pgmmem (region=0x0-0xfff)
NumBanks=4
MirrorRegs (0x1-0x1 0x101-0x101)
MirrorRegs (0x6-0x6 0x106-0x106)
MirrorRegs (0xa-0xb 0x8a-0x8b 0x10a-0x10b 0x18a-0x18b)
MirrorRegs (0x81-0x81 0x181-0x181)
MirrorRegs (0x0-0x0 0x80-0x80 0x100-0x100 0x180-0x180)
MirrorRegs (0x2-0x4 0x82-0x84 0x102-0x104 0x182-0x184)
MirrorRegs (0x86-0x86 0x186-0x186)
MirrorRegs (0x70-0x7f 0xf0-0xff 0x170-0x17f 0x1f0-0x1ff)
UnusedRegs (0x120-0x16f)
UnusedRegs (0x1a0-0x1ef)

######################################################################
#
# Special Function Registers
#
######################################################################

sfr (key=INDF addr=0x0 size=1 flags=i access='u u u u u u u u')
    reset (por='--------' mclr='--------')
    bit (names='INDF' width='8')
sfr (key=TMR0 addr=0x1 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='TMR0' width='8')
    stimulus (scl=rwb pcfiles=w regfiles=w type=int)
sfr (key=PCL addr=0x2 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='PCL' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=STATUS addr=0x3 size=1 access='rw rw rw r r rw rw rw')
    reset (por='00011xxx' mclr='000qquuu')
    bit (names='IRP RP nTO nPD Z DC C' width='1 2 1 1 1 1 1')
sfr (key=FSR addr=0x4 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='FSR' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=w type=int)
sfr (key=PORTA addr=0x5 size=1 access='u u rw rw rw rw rw rw')
    reset (por='--0x0000' mclr='--0u0000')
    bit (names='- - RA5 RA4 RA3 RA2 RA1 RA0' width='1 1 1 1 1 1 1 1')
    bit (tag=scl names='RA' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=rw)
sfr (key=PORTB addr=0x6 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='RB7 RB6 RB5 RB4 RB3 RB2 RB1 RB0' width='1 1 1 1 1 1 1 1')
    bit (tag=scl names='RB' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=rw)
sfr (key=PORTC addr=0x7 size=1 access='u u rw rw rw rw rw rw')
    reset (por='--xxxxxx' mclr='--uuuuuu')
    bit (names='- - RC5 RC4 RC3 RC2 RC1 RC0' width='1 1 1 1 1 1 1 1')
    bit (tag=scl names='RC' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=rw)
sfr (key=PORTD addr=0x8 size=1 access='r r r rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='RD7 RD6 RD5 RD4 RD3 RD2 RD1 RD0' width='1 1 1 1 1 1 1 1')
    bit (tag=scl names='RD' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=rw)
sfr (key=PORTE addr=0x9 size=1 access='r r r r r r r r')
    reset (por='00000000' mclr='00000000')
    bit (names='RE7 RE6 RE5 RE4 RE3 RE2 RE1 RE0' width='1 1 1 1 1 1 1 1')
    bit (tag=scl names='RE' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=rw)
sfr (key=PCLATH addr=0xa size=1 access='u u u rw rw rw rw rw')
    reset (por='---00000' mclr='---00000')
    bit (names='- - - PCLATH' width='1 1 1 5')
    stimulus (scl=rwb pcfiles=rw regfiles=w type=int)
sfr (key=INTCON addr=0xb size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='0000000x' mclr='0000000u')
    bit (names='GIE PEIE TMR0IE INTE RBIE TMR0IF INTF RBIF' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=PIR1 addr=0xc size=1 access='rw rw u u rw rw rw rw')
    reset (por='00--0000' mclr='00--0000')
    bit (names='LCDIF ADIF - - SSPIF CCP1IF TMR2IF TMR1IF' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
UnusedRegs (0xd-0xd)
sfr (key=TMR1 addr=0xe size=2 flags=j)
    bit (names='TMR1' width='16')
    stimulus (scl=rwb regfiles=w type=int)
sfr (key=TMR1L addr=0xe size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='TMR1L' width='8')
    stimulus (scl=rwb pcfiles=w regfiles=w type=int)
sfr (key=TMR1H addr=0xf size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='TMR1H' width='8')
    stimulus (scl=rwb pcfiles=w regfiles=w type=int)
sfr (key=T1CON addr=0x10 size=1 access='u u rw rw rw rw rw rw')
    reset (por='--000000' mclr='--uuuuuu')
    bit (names='- - T1CKPS T1OSCEN nT1SYNC TMR1CS TMR1ON' width='1 1 2 1 1 1 1')
    stimulus (scl=rwb regfiles=w)
sfr (key=TMR2 addr=0x11 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='TMR2' width='8')
    stimulus (scl=rwb pcfiles=w regfiles=w type=int)
sfr (key=T2CON addr=0x12 size=1 access='u rw rw rw rw rw rw rw')
    reset (por='-0000000' mclr='-0000000')
    bit (names='- TOUTPS TMR2ON T2CKPS' width='1 4 1 2')
    stimulus (scl=rwb regfiles=w)
sfr (key=SSPBUF addr=0x13 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='SSPBUF' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=rw type=int)
sfr (key=SSPCON addr=0x14 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='WCOL SSPOV SSPEN CKP SSPM' width='1 1 1 1 4')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=CCPR1 addr=0x15 size=2 flags=j)
    bit (names='CCPR1' width='16')
    stimulus (scl=rwb regfiles=w type=int)
sfr (key=CCPR1L addr=0x15 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='CCPR1L' width='8')
    stimulus (scl=rwb regfiles=w type=int)
sfr (key=CCPR1H addr=0x16 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='CCPR1H' width='8')
    stimulus (scl=rwb regfiles=w type=int)
sfr (key=CCP1CON addr=0x17 size=1 access='u u rw rw rw rw rw rw')
    reset (por='--000000' mclr='--000000')
    bit (names='- - DC1B CCP1M' width='1 1 2 4')
    stimulus (scl=rwb regfiles=w)
UnusedRegs (0x18-0x1d)
sfr (key=ADRES addr=0x1e size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='ADRESH' width='8')
    stimulus (scl=rwb regfiles=r type=int)
sfr (key=ADCON0 addr=0x1f size=1 access='rw rw rw rw rw rw u rw')
    reset (por='000000-0' mclr='000000-0')
    bit (names='ADCS CHS GO/nDONE - ADON' width='2 3 1 1 1')
    bit (tag=scl names='ADCS CHS GO_nDONE - ADON' width='2 3 1 1 1')
    stimulus (scl=rwb regfiles=w)
sfr (key=OPTION_REG addr=0x81 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='11111111' mclr='11111111')
    bit (names='nRBPU INTEDG T0CS T0SE PSA PS' width='1 1 1 1 1 3')
    stimulus (scl=rwb regfiles=w)
sfr (key=TRISA addr=0x85 size=1 access='u u rw rw rw rw rw rw')
    reset (por='--111111' mclr='--111111')
    bit (names='- - TRISA5 TRISA4 TRISA3 TRISA2 TRISA1 TRISA0' width='1 1 1 1 1 1 1 1')
    bit (tag=scl names='TRISA' width='8')
    stimulus (scl=rwb regfiles=w)
sfr (key=TRISB addr=0x86 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='11111111' mclr='11111111')
    bit (names='TRISB7 TRISB6 TRISB5 TRISB4 TRISB3 TRISB2 TRISB1 TRISB0' width='1 1 1 1 1 1 1 1')
    bit (tag=scl names='TRISB' width='8')
    stimulus (scl=rwb regfiles=w)
sfr (key=TRISC addr=0x87 size=1 access='u u rw rw rw rw rw rw')
    reset (por='--111111' mclr='--111111')
    bit (names='- - TRISC5 TRISC4 TRISC3 TRISC2 TRISC1 TRISC0' width='1 1 1 1 1 1 1 1')
    bit (tag=scl names='TRISC' width='8')
    stimulus (scl=rwb regfiles=w)
sfr (key=TRISD addr=0x88 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='11111111' mclr='11111111')
    bit (names='TRISD7 TRISD6 TRISD5 TRISD4 TRISD3 TRISD2 TRISD1 TRISD0' width='1 1 1 1 1 1 1 1')
    bit (tag=scl names='TRISD' width='8')
    stimulus (scl=rwb regfiles=w)
sfr (key=TRISE addr=0x89 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='11111111' mclr='11111111')
    bit (names='TRISE7 TRISE6 TRISE5 TRISE4 TRISE3 TRISE2 TRISE1 TRISE0' width='1 1 1 1 1 1 1 1')
    bit (tag=scl names='TRISE' width='8')
    stimulus (scl=rwb regfiles=w)
sfr (key=PIE1 addr=0x8c size=1 access='rw rw u u rw rw rw rw')
    reset (por='00--0000' mclr='00--0000')
    bit (names='LCDIE ADIE - - SSPIE CCP1IE TMR2IE TMR1IE' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
UnusedRegs (0x8d-0x8d)
sfr (key=PCON addr=0x8e size=1 access='u u u u u u rw u')
    reset (por='------0-' mclr='------u-')
    bit (names='- - - - - - nPOR -' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb regfiles=w)
UnusedRegs (0x8f-0x91)
sfr (key=PR2 addr=0x92 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='11111111' mclr='11111111')
    bit (names='PR2' width='8')
    stimulus (scl=rwb regfiles=w type=int)
sfr (key=SSPADD addr=0x93 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='SSPADD' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=w type=int)
sfr (key=SSPSTAT addr=0x94 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='SMP CKE D/nA P S R/nW UA BF' width='1 1 1 1 1 1 1 1')
    bit (tag=scl names='SMP CKE D_nA P S R_nW UA BF' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=rw)
UnusedRegs (0x95-0x9e)
sfr (key=ADCON1 addr=0x9f size=1 access='u u u u u rw rw rw')
    reset (por='-----000' mclr='-----000')
    bit (names='- - - - - PCFG' width='1 1 1 1 1 3')
    stimulus (scl=rwb regfiles=w)
UnusedRegs (0x105-0x105)
sfr (key=PORTF addr=0x107 size=1 access='r r r r r r r r')
    reset (por='00000000' mclr='00000000')
    bit (names='RF7 RF6 RF5 RF4 RF3 RF2 RF1 RF0' width='1 1 1 1 1 1 1 1')
    bit (tag=scl names='RF' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=rw)
sfr (key=PORTG addr=0x108 size=1 access='r r r r r r r r')
    reset (por='00000000' mclr='00000000')
    bit (names='RG7 RG6 RG5 RG4 RG3 RG2 RG1 RG0' width='1 1 1 1 1 1 1 1')
    bit (tag=scl names='RG' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=rw)
UnusedRegs (0x109-0x109)
UnusedRegs (0x10c-0x10c)
sfr (key=LCDSE addr=0x10d size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='11111111' mclr='11111111')
    bit (names='SE29 SE27 SE20 SE16 SE12 SE9 SE5 SE0' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=LCDPS addr=0x10e size=1 access='u u u u rw rw rw rw')
    reset (por='----0000' mclr='----0000')
    bit (names='- - - - LP' width='1 1 1 1 4')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=LCDCON addr=0x10f size=1 access='rw rw u rw rw rw rw rw')
    reset (por='00-00000' mclr='00-00000')
    bit (names='LCDEN SLPEN - VGEN CS LMUX' width='1 1 1 1 2 2')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=LCDD00 addr=0x110 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='SEG07 SEG06 SEG05 SEG04 SEG03 SEG02 SEG01 SEG00' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=LCDD01 addr=0x111 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='SEG15 SEG14 SEG13 SEG12 SEG11 SEG10 SEG09 SEG08' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=LCDD02 addr=0x112 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='SEG23 SEG22 SEG21 SEG20 SEG19 SEG18 SEG17 SEG16' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=LCDD03 addr=0x113 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='SEG31 SEG30 SEG29 SEG28 SEG27 SEG26 SEG25 SEG24' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=LCDD04 addr=0x114 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='SEG07 SEG06 SEG05 SEG04 SEG03 SEG02 SEG01 SEG00' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=LCDD05 addr=0x115 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='SEG15 SEG14 SEG13 SEG12 SEG11 SEG10 SEG09 SEG08' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=LCDD06 addr=0x116 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='SEG23 SEG22 SEG21 SEG20 SEG19 SEG18 SEG17 SEG16' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=LCDD07 addr=0x117 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='SEG31 SEG30 SEG29 SEG28 SEG27 SEG26 SEG25 SEG24' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=LCDD08 addr=0x118 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='SEG07 SEG06 SEG05 SEG04 SEG03 SEG02 SEG01 SEG00' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=LCDD09 addr=0x119 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='SEG15 SEG14 SEG13 SEG12 SEG11 SEG10 SEG09 SEG08' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=LCDD10 addr=0x11a size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='SEG23 SEG22 SEG21 SEG20 SEG19 SEG18 SEG17 SEG16' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=LCDD11 addr=0x11b size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='SEG31 SEG30 SEG29 SEG28 SEG27 SEG26 SEG25 SEG24' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=LCDD12 addr=0x11c size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='SEG07 SEG06 SEG05 SEG04 SEG03 SEG02 SEG01 SEG00' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=LCDD13 addr=0x11d size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='SEG15 SEG14 SEG13 SEG12 SEG11 SEG10 SEG09 SEG08' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=LCDD14 addr=0x11e size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='SEG23 SEG22 SEG21 SEG20 SEG19 SEG18 SEG17 SEG16' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=LCDD15 addr=0x11f size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='SEG31 SEG30 SEG29 SEG28 SEG27 SEG26 SEG25 SEG24' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
UnusedRegs (0x185-0x185)
sfr (key=TRISF addr=0x187 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='11111111' mclr='11111111')
    bit (names='TRISF7 TRISF6 TRISF5 TRISF4 TRISF3 TRISF2 TRISF1 TRISF0' width='1 1 1 1 1 1 1 1')
    bit (tag=scl names='TRISF' width='8')
    stimulus (scl=rwb regfiles=w)
sfr (key=TRISG addr=0x188 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='11111111' mclr='11111111')
    bit (names='TRISG7 TRISG6 TRISG5 TRISG4 TRISG3 TRISG2 TRISG1 TRISG0' width='1 1 1 1 1 1 1 1')
    bit (tag=scl names='TRISG' width='8')
    stimulus (scl=rwb regfiles=w)
UnusedRegs (0x189-0x189)
UnusedRegs (0x18c-0x19f)

######################################################################
#
# Non Memory-Mapped Registers
#
# (Conditionally visible SFRs appear as NMMRs in the "Special Function
# Registers" section.)
#
######################################################################

HasNMMR=1
nmmr (key=WREG addr=0x0 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
nmmr (key=STKPTR addr=0x1 size=1 flags=h access='rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
NMMRObjSize=2

######################################################################
#
# Configuration Registers
#
######################################################################

cfgbits (key=CONFIG1 addr=0x2007 unused=0xc0)
    field (key=FOSC mask=0x3 desc="Oscillator selection bits")
        setting (req=0x3 value=0x3 desc="RC oscillator")
        setting (req=0x3 value=0x2 desc="HS oscillator")
        setting (req=0x3 value=0x1 desc="XT oscillator")
        setting (req=0x3 value=0x0 desc="LP oscillator")
    field (key=WDTE mask=0x4 desc="Watchdog Timer Enable bit")
        setting (req=0x4 value=0x4 desc="Enabled")
        setting (req=0x4 value=0x0 desc="Disabled")
    field (key=PWRTE mask=0x8 desc="Power-up Timer Enable bit")
        setting (req=0x8 value=0x8 desc="Disabled")
        setting (req=0x8 value=0x0 desc="Enabled")
    field (key=CP mask=0x3f30 desc="Code Protection bits")
        setting (req=0x3f30 value=0x3f30 desc="Disabled")
            checksum (type=0x0 protregion=0x0-0x0)
        setting (req=0x3f30 value=0x2a20 desc="0800h-0FFFh code protected")
            checksum (type=0x20 protregion=0x800-0xfff)
        setting (req=0x3f30 value=0x1510 desc="0400h-0FFFh code protected")
            checksum (type=0x20 protregion=0x400-0xfff)
        setting (req=0x3f30 value=0x0 desc="All memory is code protected")
            checksum (type=0x20 protregion=0x0-0xfff)
