######################################################################
#
# MPLAB IDE .dev File Generated by `pic2dev.py'
#
# Device: PIC24F16KM102
# Family: 24xxxx
# Date: Tue Apr 30 09:48:20 2013
#
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######################################################################
#
# Memory Regions & Other General Device Information
#
######################################################################

vpp (range=5.125-7.625 dflt=7.25)
vdd (range=1.875-3.500 dfltrange=1.875-3.500 nominal=3.250)
pgming (memtech=ee tries=1)
    wait (pgm=10000 eedata=10000 cfg=10000 userid=10000 erase=600)
    latches (pgm=32 eedata=2 cfg=2 rowerase=128)
breakpoints (numhwbp=3 datacapture=true idbyte=x)
eedata (region=0x7ffe00-0x7fffff)
testmem (region=0x800000-0x80087f appregion=0x800000-0x8007ff)
devid (region=0xff0000-0xff0003 idmask=0xffff0000 id=0x550a0000)
bkbgvectmem (region=0x800000-0x800007)
cfgmem (region=0xf80000-0xf8000f)
pgmmem (region=0x0-0x2bff)
vectors (region=0x4-0xff altregion=0x104-0x1ff)
xymem (region=0x800-0xbff ymem=0x0-0x0)
emulreg (region=0xfd0000-0xfd0039)
NumBanks=0

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#
# Special Function Registers
#
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sfr (key=WREG0 addr=0x0 size=2 access='rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw')
    reset (por='0000000000000000' mclr='0000000000000000')
    bit (names='WREG0' width='16')
    stimulus (scl=r type=int)
sfr (key=WREG1 addr=0x2 size=2 access='rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw')
    reset (por='0000000000000000' mclr='0000000000000000')
    bit (names='WREG1' width='16')
    stimulus (scl=r type=int)
sfr (key=WREG2 addr=0x4 size=2 access='rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw')
    reset (por='0000000000000000' mclr='0000000000000000')
    bit (names='WREG2' width='16')
    stimulus (scl=r type=int)
sfr (key=WREG3 addr=0x6 size=2 access='rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw')
    reset (por='0000000000000000' mclr='0000000000000000')
    bit (names='WREG3' width='16')
    stimulus (scl=r type=int)
sfr (key=WREG4 addr=0x8 size=2 access='rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw')
    reset (por='0000000000000000' mclr='0000000000000000')
    bit (names='WREG4' width='16')
    stimulus (scl=r type=int)
sfr (key=WREG5 addr=0xa size=2 access='rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw')
    reset (por='0000000000000000' mclr='0000000000000000')
    bit (names='WREG5' width='16')
    stimulus (scl=r type=int)
sfr (key=WREG6 addr=0xc size=2 access='rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw')
    reset (por='0000000000000000' mclr='0000000000000000')
    bit (names='WREG6' width='16')
    stimulus (scl=r type=int)
sfr (key=WREG7 addr=0xe size=2 access='rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw')
    reset (por='0000000000000000' mclr='0000000000000000')
    bit (names='WREG7' width='16')
    stimulus (scl=r type=int)
sfr (key=WREG8 addr=0x10 size=2 access='rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw')
    reset (por='0000000000000000' mclr='0000000000000000')
    bit (names='WREG8' width='16')
    stimulus (scl=r type=int)
sfr (key=WREG9 addr=0x12 size=2 access='rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw')
    reset (por='0000000000000000' mclr='0000000000000000')
    bit (names='WREG9' width='16')
    stimulus (scl=r type=int)
sfr (key=WREG10 addr=0x14 size=2 access='rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw')
    reset (por='0000000000000000' mclr='0000000000000000')
    bit (names='WREG10' width='16')
    stimulus (scl=r type=int)
sfr (key=WREG11 addr=0x16 size=2 access='rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw')
    reset (por='0000000000000000' mclr='0000000000000000')
    bit (names='WREG11' width='16')
    stimulus (scl=r type=int)
sfr (key=WREG12 addr=0x18 size=2 access='rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw')
    reset (por='0000000000000000' mclr='0000000000000000')
    bit (names='WREG12' width='16')
    stimulus (scl=r type=int)
sfr (key=WREG13 addr=0x1a size=2 access='rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw')
    reset (por='0000000000000000' mclr='0000000000000000')
    bit (names='WREG13' width='16')
    stimulus (scl=r type=int)
sfr (key=WREG14 addr=0x1c size=2 access='rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw')
    reset (por='0000000000000000' mclr='0000000000000000')
    bit (names='WREG14' width='16')
    stimulus (scl=r type=int)
sfr (key=WREG15 addr=0x1e size=2 access='rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw u')
    reset (por='0000100000000000' mclr='0000100000000000')
    bit (names='WREG15' width='16')
    stimulus (scl=r type=int)
sfr (key=SPLIM addr=0x20 size=2 access='rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw r')
    reset (por='xxxxxxxxxxxxxxxx' mclr='xxxxxxxxxxxxxxxx')
    bit (names='SPLIM' width='16')
    stimulus (scl=r type=int)
UnusedRegs (0x22-0x2d)
sfr (key=PC addr=0x2e size=4 flags=j)
    stimulus (scl=rb type=pc)
sfr (key=PCL addr=0x2e size=2 access='r r r r r r r r r r r r r r r r')
    reset (por='0000000000000000' mclr='0000000000000000')
    bit (names='PCL' width='16')
    stimulus (scl=rb)
sfr (key=PCH addr=0x30 size=2 access='u u u u u u u u r r r r r r r r')
    reset (por='--------00000000' mclr='--------00000000')
    bit (names='- - - - - - - - PCH' width='1 1 1 1 1 1 1 1 8')
    stimulus (scl=rb)
sfr (key=TBLPAG addr=0x32 size=2 access='u u u u u u u u rw rw rw rw rw rw rw rw')
    reset (por='--------00000000' mclr='--------00000000')
    bit (names='- - - - - - - - TBLPAG' width='1 1 1 1 1 1 1 1 8')
sfr (key=PSVPAG addr=0x34 size=2 access='u u u u u u u u rw rw rw rw rw rw rw rw')
    reset (por='--------00000000' mclr='--------00000000')
    bit (names='- - - - - - - - PSVPAG' width='1 1 1 1 1 1 1 1 8')
    stimulus (scl=r type=int)
sfr (key=RCOUNT addr=0x36 size=2 access='rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxxxxxxxxxx' mclr='uuuuuuuuuuuuuuuu')
    bit (names='RCOUNT' width='16')
    stimulus (scl=r type=int)
UnusedRegs (0x38-0x41)
sfr (key=SR addr=0x42 size=2 access='u u u u u u u rw rw rw rw r rw rw rw rw')
    reset (por='-------000000000' mclr='-------000000000')
    bit (names='- - - - - - - DC IPL2 IPL1 IPL0 RA N OV Z C' width='1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1')
    stimulus (scl=r)
sfr (key=CORCON addr=0x44 size=2 access='u u u u u u u u u u u u rc rw u u')
    reset (por='------------00--' mclr='------------00--')
    bit (names='- - - - - - - - - - - - IPL3 - - -' width='1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1')
    stimulus (scl=r)
UnusedRegs (0x46-0x51)
sfr (key=DISICNT addr=0x52 size=2 access='u u rw rw rw rw rw rw rw rw rw rw rw rw rw rw')
    reset (por='--xxxxxxxxxxxxxx' mclr='--xxxxxxxxxxxxxx')
    bit (names='- - DISICNT' width='1 1 14')
    stimulus (scl=r type=int)
UnusedRegs (0x54-0x55)
sfr (key=CNPD1 addr=0x56 size=2 access='rw rw rw rw rw u rw rw rw rw rw rw rw rw rw rw')
    reset (por='00000-0000000000' mclr='00000-0000000000')
    bit (names='CN15PDE CN14PDE CN13PDE CN12PDE CN11PDE - CN9PDE CN8PDE CN7PDE CN6PDE CN5PDE CN4PDE CN3PDE CN2PDE CN1PDE CN0PDE' width='1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1')
sfr (key=CNPD2 addr=0x58 size=2 access='u rw rw u rw u u rw rw rw rw u u u u rw')
    reset (por='-00-0--0000----0' mclr='-00-0--0000----0')
    bit (names='- CN30PDE CN29PDE - CN27PDE - - CN24PDE CN23PDE CN22PDE CN21PDE - - - - CN16PDE' width='1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1')
UnusedRegs (0x5a-0x61)
sfr (key=CNEN1 addr=0x62 size=2 access='rw rw rw rw rw u rw rw rw rw rw rw rw rw rw rw')
    reset (por='00000-0000000000' mclr='00000-0000000000')
    bit (names='CN15IE CN14IE CN13IE CN12IE CN11IE - CN9IE CN8IE CN7IE CN6IE CN5IE CN4IE CN3IE CN2IE CN1IE CN0IE' width='1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1')
sfr (key=CNEN2 addr=0x64 size=2 access='u rw rw u rw u u rw rw rw rw u u u u rw')
    reset (por='-00-0--0000----0' mclr='-00-0--0000----0')
    bit (names='- CN30IE CN29IE - CN27IE - - CN24IE CN23IE CN22IE CN21IE - - - - CN16IE' width='1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1')
UnusedRegs (0x66-0x6d)
sfr (key=CNPU1 addr=0x6e size=2 access='rw rw rw rw rw u rw rw rw rw rw rw rw rw rw rw')
    reset (por='00000-0000000000' mclr='00000-0000000000')
    bit (names='CN15PUE CN14PUE CN13PUE CN12PUE CN11PUE - CN9PUE CN8PUE CN7PUE CN6PUE CN5PUE CN4PUE CN3PUE CN2PUE CN1PUE CN0PUE' width='1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1')
sfr (key=CNPU2 addr=0x70 size=2 access='u rw rw u rw u u rw rw rw rw u u u u rw')
    reset (por='-00-0--0000----0' mclr='-00-0--0000----0')
    bit (names='- CN30PUE CN29PUE - CN27PUE - - CN24PUE CN23PUE CN22PUE CN21PUE - - - - CN16PUE' width='1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1')
UnusedRegs (0x72-0x7f)
sfr (key=INTCON1 addr=0x80 size=2 access='rw u u u u u u u u u u rw rw rw rw u')
    reset (por='0----------0000-' mclr='0----------0000-')
    bit (names='NSTDIS - - - - - - - - - - MATHERR ADDRERR STKERR OSCFAIL -' width='1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1')
    stimulus (scl=rwb)
sfr (key=INTCON2 addr=0x82 size=2 access='rw r u u u u u u u u u u u rw rw rw')
    reset (por='00-----------000' mclr='00-----------000')
    bit (names='ALTIVT DISI - - - - - - - - - - - INT2EP INT1EP INT0EP' width='1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1')
    stimulus (scl=rwb)
sfr (key=IFS0 addr=0x84 size=2 access='rw u rw rw rw u u rw rw u u u rw rw rw rw')
    reset (por='0-000--00---0000' mclr='0-000--00---0000')
    bit (names='NVMIF - AD1IF U1TXIF U1RXIF - - CCT2IF CCT1IF - - - T1IF CCP2IF CCP1IF INT0IF' width='1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1')
    stimulus (scl=rwb)
sfr (key=IFS1 addr=0x86 size=2 access='u u rw u u u u u u u u rw rw rw rw rw')
    reset (por='--0--------00000' mclr='--0--------00000')
    bit (names='- - INT2IF - - - - - - - - INT1IF CNIF CMIF BCL1IF SSP1IF' width='1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1')
    stimulus (scl=rwb)
UnusedRegs (0x88-0x8b)
sfr (key=IFS4 addr=0x8c size=2 access='u u rw u u u u rw u u u u u u rw u')
    reset (por='--0----0------0-' mclr='--0----0------0-')
    bit (names='- - CTMUIF - - - - HLVDIF - - - - - - U1ERIF -' width='1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1')
    stimulus (scl=rwb)
sfr (key=IFS5 addr=0x8e size=2 access='u u u u u u u u u u u u u u u rw')
    reset (por='---------------0' mclr='---------------0')
    bit (names='- - - - - - - - - - - - - - - ULPWUIF' width='1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1')
    stimulus (scl=rwb)
sfr (key=IFS6 addr=0x90 size=2 access='u u u u u u u u u u u u u u u rw')
    reset (por='---------------0' mclr='---------------0')
    bit (names='- - - - - - - - - - - - - - - CLC1IF' width='1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1')
UnusedRegs (0x92-0x93)
sfr (key=IEC0 addr=0x94 size=2 access='rw u rw rw rw u u rw rw u u u rw rw rw rw')
    reset (por='0-000--00---0000' mclr='0-000--00---0000')
    bit (names='NVMIE - AD1IE U1TXIE U1RXIE - - CCT2IE CCT1IE - - - T1IE CCP2IE CCP1IE INT0IE' width='1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1')
    stimulus (scl=rwb)
sfr (key=IEC1 addr=0x96 size=2 access='u u rw u u u u u u u u rw rw rw rw rw')
    reset (por='--0--------00000' mclr='--0--------00000')
    bit (names='- - INT2IE - - - - - - - - INT1IE CNIE CMIE BCL1IE SSP1IE' width='1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1')
    stimulus (scl=rwb)
UnusedRegs (0x98-0x9b)
sfr (key=IEC4 addr=0x9c size=2 access='u u rw u u u u rw u u u u u u rw u')
    reset (por='--0----0------0-' mclr='--0----0------0-')
    bit (names='- - CTMUIE - - - - HLVDIE - - - - - - U1ERIE -' width='1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1')
    stimulus (scl=rwb)
sfr (key=IEC5 addr=0x9e size=2 access='u u u u u u u u u u u u u u u rw')
    reset (por='---------------0' mclr='---------------0')
    bit (names='- - - - - - - - - - - - - - - ULPWUIE' width='1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1')
    stimulus (scl=rwb)
sfr (key=IEC6 addr=0xa0 size=2 access='u u u u u u u u u u u u u u u rw')
    reset (por='---------------0' mclr='---------------0')
    bit (names='- - - - - - - - - - - - - - - CLC1IE' width='1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1')
UnusedRegs (0xa2-0xa3)
sfr (key=IPC0 addr=0xa4 size=2 access='u rw rw rw u rw rw rw u rw rw rw u rw rw rw')
    reset (por='-100-100-100-100' mclr='-100-100-100-100')
    bit (names='- T1IP - CCP2IP - CCP1IP - INT0IP' width='1 3 1 3 1 3 1 3')
    stimulus (scl=rwb)
sfr (key=IPC1 addr=0xa6 size=2 access='u rw rw rw u u u u u u u u u u u u')
    reset (por='-100------------' mclr='-100------------')
    bit (names='- CCT1IP - - - - - - - - - - - -' width='1 3 1 1 1 1 1 1 1 1 1 1 1 1')
    stimulus (scl=rwb)
sfr (key=IPC2 addr=0xa8 size=2 access='u rw rw rw u u u u u u u u u rw rw rw')
    reset (por='-100---------100' mclr='-100---------100')
    bit (names='- U1RXIP - - - - - - - - - CCT2IP' width='1 3 1 1 1 1 1 1 1 1 1 3')
    stimulus (scl=rwb)
sfr (key=IPC3 addr=0xaa size=2 access='u rw rw rw u u u u u rw rw rw u rw rw rw')
    reset (por='-100-----100-100' mclr='-100-----100-100')
    bit (names='- NVMIP - - - - - AD1IP - U1TXIP' width='1 3 1 1 1 1 1 3 1 3')
    stimulus (scl=rwb)
sfr (key=IPC4 addr=0xac size=2 access='u rw rw rw u rw rw rw u rw rw rw u rw rw rw')
    reset (por='-100-100-100-100' mclr='-100-100-100-100')
    bit (names='- CNIP - CMIP - BCL1IP - SSP1IP' width='1 3 1 3 1 3 1 3')
    stimulus (scl=rwb)
sfr (key=IPC5 addr=0xae size=2 access='u u u u u u u u u u u u u rw rw rw')
    reset (por='-------------100' mclr='-------------100')
    bit (names='- - - - - - - - - - - - - INT1IP' width='1 1 1 1 1 1 1 1 1 1 1 1 1 3')
    stimulus (scl=rwb)
UnusedRegs (0xb0-0xb1)
sfr (key=IPC7 addr=0xb2 size=2 access='u u u u u u u u u rw rw rw u u u u')
    reset (por='---------100----' mclr='---------100----')
    bit (names='- - - - - - - - - INT2IP - - - -' width='1 1 1 1 1 1 1 1 1 3 1 1 1 1')
    stimulus (scl=rwb)
UnusedRegs (0xb4-0xc3)
sfr (key=IPC16 addr=0xc4 size=2 access='u u u u u u u u u rw rw rw u u u u')
    reset (por='---------100----' mclr='---------100----')
    bit (names='- - - - - - - - - U1ERIP - - - -' width='1 1 1 1 1 1 1 1 1 3 1 1 1 1')
    stimulus (scl=rwb)
UnusedRegs (0xc6-0xc7)
sfr (key=IPC18 addr=0xc8 size=2 access='u u u u u u u u u u u u u rw rw rw')
    reset (por='-------------100' mclr='-------------100')
    bit (names='- - - - - - - - - - - - - HLVDIP' width='1 1 1 1 1 1 1 1 1 1 1 1 1 3')
    stimulus (scl=rwb)
sfr (key=IPC19 addr=0xca size=2 access='u u u u u u u u u rw rw rw u u u u')
    reset (por='---------100----' mclr='---------100----')
    bit (names='- - - - - - - - - CTMUIP - - - -' width='1 1 1 1 1 1 1 1 1 3 1 1 1 1')
    stimulus (scl=rwb)
sfr (key=IPC20 addr=0xcc size=2 access='u u u u u u u u u u u u u rw rw rw')
    reset (por='-------------100' mclr='-------------100')
    bit (names='- - - - - - - - - - - - - ULPWUIP' width='1 1 1 1 1 1 1 1 1 1 1 1 1 3')
    stimulus (scl=rwb)
UnusedRegs (0xce-0xd3)
sfr (key=IPC24 addr=0xd4 size=2 access='u u u u u u u u u u u u u rw rw rw')
    reset (por='-------------100' mclr='-------------100')
    bit (names='- - - - - - - - - - - - - CLC1IP' width='1 1 1 1 1 1 1 1 1 1 1 1 1 3')
UnusedRegs (0xd6-0xdf)
sfr (key=INTTREG addr=0xe0 size=2 access='r u rw u r r r r u rw rw rw rw rw rw rw')
    reset (por='0-0-0000-0000000' mclr='0-0-0000-0000000')
    bit (names='CPUIRQ - VHOLD - ILR - VECNUM' width='1 1 1 1 4 1 7')
UnusedRegs (0xe2-0xff)
sfr (key=TMR1 addr=0x100 size=2 access='rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw')
    reset (por='0000000000000000' mclr='0000000000000000')
    bit (names='TMR1' width='16')
sfr (key=PR1 addr=0x102 size=2 access='rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw')
    reset (por='1111111111111111' mclr='1111111111111111')
    bit (names='PR1' width='16')
sfr (key=T1CON addr=0x104 size=2 access='rw u rw u u u rw rw u rw rw rw u rw rw u')
    reset (por='0-0---00-000-00-' mclr='0-0---00-000-00-')
    bit (names='TON - TSIDL - - - TECS - TGATE TCKPS - TSYNC TCS -' width='1 1 1 1 1 1 2 1 1 2 1 1 1 1')
    freeze (name='TIMER @' bit=14 polarity=1)
UnusedRegs (0x106-0x121)
sfr (key=CLC1CONL addr=0x122 size=2 access='rw u rw u rw rw u u rw rw rw u u rw rw rw')
    reset (por='0-0-00--000--000' mclr='0-0-00--000--000')
    bit (names='LCEN - - - INTP INTN - - LCOE LCOUT LCPOL - - MODE' width='1 1 1 1 1 1 1 1 1 1 1 1 1 3')
    freeze (name='CLC 1' bit=14 polarity=1)
sfr (key=CLC1CONH addr=0x124 size=2 access='u u u u u u u u u u u u rw rw rw rw')
    reset (por='------------0000' mclr='------------0000')
    bit (names='- - - - - - - - - - - - G4POL G3POL G2POL G1POL' width='1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1')
sfr (key=CLC1SELL addr=0x126 size=2 access='u rw rw rw u rw rw rw u rw rw rw u rw rw rw')
    reset (por='-000-000-000-000' mclr='-000-000-000-000')
    bit (names='- DS4 - DS3 - DS2 - DS1' width='1 3 1 3 1 3 1 3')
UnusedRegs (0x128-0x129)
sfr (key=CLC1GLSL addr=0x12a size=2 access='rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw')
    reset (por='0000000000000000' mclr='0000000000000000')
    bit (names='G2D4T G2D4N G2D3T G2D3N G2D2T G2D2N G2D1T G2D1N G1D4T G1D4N G1D3T G1D3N G1D2T G1D2N G1D1T G1D1N' width='1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1')
sfr (key=CLC1GLSH addr=0x12c size=2 access='rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw')
    reset (por='0000000000000000' mclr='0000000000000000')
    bit (names='G4D4T G4D4N G4D3T G4D3N G4D2T G4D2N G4D1T G4D1N G3D4T G3D4N G3D3T G3D3N G3D2T G3D2N G3D1T G3D1N' width='1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1')
UnusedRegs (0x12e-0x13f)
sfr (key=CCP1CON1L addr=0x140 size=2 access='rw u rw rw rw rw rw rw rw rw rw rw rw rw rw rw')
    reset (por='0-00000000000000' mclr='0-00000000000000')
    bit (names='CCPON - CCPSIDL CCPSLP TMRSYNC CLKSEL TMRPS TMR32 CCSEL MOD' width='1 1 1 1 1 3 2 1 1 4')
    freeze (name='MCCP/SCCP 1' bit=14 polarity=1)
sfr (key=CCP1CON1H addr=0x142 size=2 access='rw rw u u rw rw rw rw rw rw rw rw rw rw rw rw')
    reset (por='00--000000000000' mclr='00--000000000000')
    bit (names='OPSRC RTRGEN - - IOPS TRIGEN ONESHOT ALTSYNC SYNC' width='1 1 1 1 4 1 1 1 5')
sfr (key=CCP1CON2L addr=0x144 size=2 access='rw rw u rw u u u u rw rw rw rw rw rw rw rw')
    reset (por='00-0----00000000' mclr='00-0----00000000')
    bit (names='PWMRSEN ASDGM - SSDG - - - - ASDG' width='1 1 1 1 1 1 1 1 8')
sfr (key=CCP1CON2H addr=0x146 size=2 access='rw u rw rw rw rw rw rw rw rw u rw rw rw rw rw')
    reset (por='0-00000100-00000' mclr='0-00000100-00000')
    bit (names='OENSYNC - OCFEN OCEEN OCDEN OCCEN OCBEN OCAEN ICGSM - AUXOUT ICSEL' width='1 1 1 1 1 1 1 1 2 1 2 3')
sfr (key=CCP1CON3L addr=0x148 size=2 access='u u u u u u u u u u rw rw rw rw rw rw')
    reset (por='----------000000' mclr='----------000000')
    bit (names='- - - - - - - - - - DT' width='1 1 1 1 1 1 1 1 1 1 6')
sfr (key=CCP1CON3H addr=0x14a size=2 access='rw rw rw rw u rw rw rw u u rw rw rw rw rw rw')
    reset (por='0000-000--000000' mclr='0000-000--000000')
    bit (names='OETRIG OSCNT - OUTM - - POLACE POLBDF PSSACE PSSBDF' width='1 3 1 3 1 1 1 1 2 2')
sfr (key=CCP1STATL addr=0x14c size=2 access='u u u u u u u u rw rw rw rw rw rw rw r')
    reset (por='--------00xx0000' mclr='--------00xx0000')
    bit (names='- - - - - - - - TRIG TRSET TRCLR ASEVT SCEVT ICDIS ICOV ICBNE' width='1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1')
UnusedRegs (0x14e-0x14f)
sfr (key=CCP1TMRL addr=0x150 size=2 access='rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw')
    reset (por='0000000000000000' mclr='0000000000000000')
    bit (names='TMR' width='16')
sfr (key=CCP1TMRH addr=0x152 size=2 access='rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw')
    reset (por='0000000000000000' mclr='0000000000000000')
    bit (names='TMR' width='16')
sfr (key=CCP1PRL addr=0x154 size=2 access='rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw')
    reset (por='1111111111111111' mclr='1111111111111111')
    bit (names='PR' width='16')
sfr (key=CCP1PRH addr=0x156 size=2 access='rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw')
    reset (por='1111111111111111' mclr='1111111111111111')
    bit (names='PR' width='16')
sfr (key=CCP1RAL addr=0x158 size=2 access='rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw')
    reset (por='0000000000000000' mclr='0000000000000000')
    bit (names='CMP' width='16')
UnusedRegs (0x15a-0x15b)
sfr (key=CCP1RBL addr=0x15c size=2 access='rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw')
    reset (por='0000000000000000' mclr='0000000000000000')
    bit (names='CMP' width='16')
UnusedRegs (0x15e-0x15f)
sfr (key=CCP1BUFL addr=0x160 size=2 access='rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw')
    reset (por='0000000000000000' mclr='0000000000000000')
    bit (names='BUF' width='16')
sfr (key=CCP1BUFH addr=0x162 size=2 access='rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw')
    reset (por='0000000000000000' mclr='0000000000000000')
    bit (names='BUF' width='16')
sfr (key=CCP2CON1L addr=0x164 size=2 access='rw u rw rw rw rw rw rw rw rw rw rw rw rw rw rw')
    reset (por='0-00000000000000' mclr='0-00000000000000')
    bit (names='CCPON - CCPSIDL CCPSLP TMRSYNC CLKSEL TMRPS TMR32 CCSEL MOD' width='1 1 1 1 1 3 2 1 1 4')
    freeze (name='MCCP/SCCP 2' bit=14 polarity=1)
sfr (key=CCP2CON1H addr=0x166 size=2 access='rw rw u u rw rw rw rw rw rw rw rw rw rw rw rw')
    reset (por='00--000000000000' mclr='00--000000000000')
    bit (names='OPSRC RTRGEN - - IOPS TRIGEN ONESHOT ALTSYNC SYNC' width='1 1 1 1 4 1 1 1 5')
sfr (key=CCP2CON2L addr=0x168 size=2 access='rw rw u rw u u u u rw rw rw rw rw rw rw rw')
    reset (por='00-0----00000000' mclr='00-0----00000000')
    bit (names='PWMRSEN ASDGM - SSDG - - - - ASDG' width='1 1 1 1 1 1 1 1 8')
sfr (key=CCP2CON2H addr=0x16a size=2 access='rw u u u u u u rw rw rw u rw rw rw rw rw')
    reset (por='0------100-00000' mclr='0------100-00000')
    bit (names='OENSYNC - - - - - - OCAEN ICGSM - AUXOUT ICSEL' width='1 1 1 1 1 1 1 1 2 1 2 3')
UnusedRegs (0x16c-0x16d)
sfr (key=CCP2CON3H addr=0x16e size=2 access='rw rw rw rw u u u u u u rw u rw rw u u')
    reset (por='0000------0-00--' mclr='0000------0-00--')
    bit (names='OETRIG OSCNT - - - - - - POLACE - PSSACE - -' width='1 3 1 1 1 1 1 1 1 1 2 1 1')
sfr (key=CCP2STATL addr=0x170 size=2 access='u u u u u u u u rw rw rw rw rw rw rw r')
    reset (por='--------00xx0000' mclr='--------00xx0000')
    bit (names='- - - - - - - - TRIG TRSET TRCLR ASEVT SCEVT ICDIS ICOV ICBNE' width='1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1')
UnusedRegs (0x172-0x173)
sfr (key=CCP2TMRL addr=0x174 size=2 access='rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw')
    reset (por='0000000000000000' mclr='0000000000000000')
    bit (names='TMR' width='16')
sfr (key=CCP2TMRH addr=0x176 size=2 access='rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw')
    reset (por='0000000000000000' mclr='0000000000000000')
    bit (names='TMR' width='16')
sfr (key=CCP2PRL addr=0x178 size=2 access='rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw')
    reset (por='1111111111111111' mclr='1111111111111111')
    bit (names='PR' width='16')
sfr (key=CCP2PRH addr=0x17a size=2 access='rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw')
    reset (por='1111111111111111' mclr='1111111111111111')
    bit (names='PR' width='16')
sfr (key=CCP2RAL addr=0x17c size=2 access='rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw')
    reset (por='0000000000000000' mclr='0000000000000000')
    bit (names='CMP' width='16')
UnusedRegs (0x17e-0x17f)
sfr (key=CCP2RBL addr=0x180 size=2 access='rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw')
    reset (por='0000000000000000' mclr='0000000000000000')
    bit (names='CMP' width='16')
UnusedRegs (0x182-0x183)
sfr (key=CCP2BUFL addr=0x184 size=2 access='rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw')
    reset (por='0000000000000000' mclr='0000000000000000')
    bit (names='BUF' width='16')
sfr (key=CCP2BUFH addr=0x186 size=2 access='rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw')
    reset (por='0000000000000000' mclr='0000000000000000')
    bit (names='BUF' width='16')
UnusedRegs (0x188-0x1ff)
sfr (key=SSP1BUF addr=0x200 size=2 access='u u u u u u u u rw rw rw rw rw rw rw rw')
    reset (por='--------xxxxxxxx' mclr='--------uuuuuuuu')
    bit (names='- - - - - - - - SSPBUF' width='1 1 1 1 1 1 1 1 8')
    stimulus (scl=rwb pcfiles=rw regfiles=rw type=int)
sfr (key=SSP1CON1 addr=0x202 size=2 access='u u u u u u u u rw rc rw rw rw rw rw rw')
    reset (por='--------00000000' mclr='--------00000000')
    bit (names='- - - - - - - - WCOL SSPOV SSPEN CKP SSPM' width='1 1 1 1 1 1 1 1 1 1 1 1 4')
    stimulus (scl=rwb pcfiles=r regfiles=r)
sfr (key=SSP1CON2 addr=0x204 size=2 access='u u u u u u u u rw r rw rw rw rw rw rw')
    reset (por='--------00000000' mclr='--------00000000')
    bit (names='- - - - - - - - GCEN ACKSTAT ACKDT ACKEN RCEN PEN RSEN SEN' width='1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=w regfiles=w)
sfr (key=SSP1CON3 addr=0x206 size=2 access='u u u u u u u u r rw rw rw rw rw rw rw')
    reset (por='--------00000000' mclr='--------00000000')
    bit (names='- - - - - - - - ACKTIM PCIE SCIE BOEN SDAHT SBCDE AHEN DHEN' width='1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1')
sfr (key=SSP1STAT addr=0x208 size=2 access='u u u u u u u u rw rw r r r r r r')
    reset (por='--------00000000' mclr='--------00000000')
    bit (names='- - - - - - - - SMP CKE D_nA P S R_nW UA BF' width='1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1')
    bit (tag=scl names='- - - - - - - - - - D - - R - -' width='1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1')
sfr (key=SSP1ADD addr=0x20a size=2 access='u u u u u u u u rw rw rw rw rw rw rw rw')
    reset (por='--------00000000' mclr='--------00000000')
    bit (names='- - - - - - - - SSPADD' width='1 1 1 1 1 1 1 1 8')
sfr (key=SSP1MSK addr=0x20c size=2 access='u u u u u u u u rw rw rw rw rw rw rw rw')
    reset (por='--------11111111' mclr='--------11111111')
    bit (names='- - - - - - - - MSK7 MSK6 MSK5 MSK4 MSK3 MSK2 MSK1 MSK0' width='1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1')
UnusedRegs (0x20e-0x21f)
sfr (key=U1MODE addr=0x220 size=2 access='rw u rw rw rw u rw rw rw rw rw rw rw rw rw rw')
    reset (por='0-000-0000000000' mclr='0-000-0000000000')
    bit (names='UARTEN - USIDL IREN RTSMD - UEN WAKE LPBACK ABAUD URXINV BRGH PDSEL STSEL' width='1 1 1 1 1 1 2 1 1 1 1 1 2 1')
    stimulus (scl=rwb)
    freeze (name='UART 1' bit=14 polarity=1)
sfr (key=U1STA addr=0x222 size=2 access='rw rw rw u rw rw r r rw rw rw r r r rc r')
    reset (por='000-000100010000' mclr='000-000100010000')
    bit (names='UTXISEL1 UTXINV UTXISEL0 - UTXBRK UTXEN UTXBF TRMT URXISEL ADDEN RIDLE PERR FERR OERR URXDA' width='1 1 1 1 1 1 1 1 2 1 1 1 1 1 1')
    stimulus (scl=rwb)
sfr (key=U1TXREG addr=0x224 size=2 access='u u u u u u u w w w w w w w w w')
    reset (por='-------xxxxxxxxx' mclr='-------xxxxxxxxx')
    bit (names='- - - - - - - U1TXREG' width='1 1 1 1 1 1 1 9')
    stimulus (scl=rwb regfiles=w)
sfr (key=U1RXREG addr=0x226 size=2 access='u u u u u u u r r r r r r r r r')
    reset (por='-------000000000' mclr='-------000000000')
    bit (names='- - - - - - - U1RXREG' width='1 1 1 1 1 1 1 9')
    stimulus (scl=rb regfiles=rp)
sfr (key=U1BRG addr=0x228 size=2 access='rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw')
    reset (por='0000000000000000' mclr='0000000000000000')
    bit (names='BRG' width='16')
    stimulus (scl=rwb)
UnusedRegs (0x22a-0x2bf)
sfr (key=TRISA addr=0x2c0 size=2 access='u u u u u u u u rw rw u rw rw rw rw rw')
    reset (por='--------11-11111' mclr='--------11-11111')
    bit (names='- - - - - - - - TRISA7 TRISA6 - TRISA4 TRISA3 TRISA2 TRISA1 TRISA0' width='1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1')
    bit (tag=scl names='TRISA' width='16')
sfr (key=PORTA addr=0x2c2 size=2 access='u u u u u u u u rw rw rw rw rw rw rw rw')
    reset (por='--------xxxxxxxx' mclr='--------xxxxxxxx')
    bit (names='- - - - - - - - RA7 RA6 RA5 RA4 RA3 RA2 RA1 RA0' width='1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1')
    bit (tag=scl names='RA' width='16')
    stimulus (scl=rwb pcfiles=rw regfiles=rw)
sfr (key=LATA addr=0x2c4 size=2 access='u u u u u u u u rw rw u rw rw rw rw rw')
    reset (por='--------xx-xxxxx' mclr='--------xx-xxxxx')
    bit (names='- - - - - - - - LATA7 LATA6 - LATA4 LATA3 LATA2 LATA1 LATA0' width='1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1')
    bit (tag=scl names='LATA' width='16')
sfr (key=ODCA addr=0x2c6 size=2 access='u u u u u u u u rw rw u rw rw rw rw rw')
    reset (por='--------00-00000' mclr='--------00-00000')
    bit (names='- - - - - - - - ODA7 ODA6 - ODA4 ODA3 ODA2 ODA1 ODA0' width='1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1')
    bit (tag=scl names='ODCA' width='16')
sfr (key=TRISB addr=0x2c8 size=2 access='rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw')
    reset (por='1111111111111111' mclr='1111111111111111')
    bit (names='TRISB15 TRISB14 TRISB13 TRISB12 TRISB11 TRISB10 TRISB9 TRISB8 TRISB7 TRISB6 TRISB5 TRISB4 TRISB3 TRISB2 TRISB1 TRISB0' width='1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1')
    bit (tag=scl names='TRISB' width='16')
sfr (key=PORTB addr=0x2ca size=2 access='rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxxxxxxxxxx' mclr='xxxxxxxxxxxxxxxx')
    bit (names='RB15 RB14 RB13 RB12 RB11 RB10 RB9 RB8 RB7 RB6 RB5 RB4 RB3 RB2 RB1 RB0' width='1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1')
    bit (tag=scl names='RB' width='16')
    stimulus (scl=rwb pcfiles=rw regfiles=rw)
sfr (key=LATB addr=0x2cc size=2 access='rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxxxxxxxxxx' mclr='xxxxxxxxxxxxxxxx')
    bit (names='LATB15 LATB14 LATB13 LATB12 LATB11 LATB10 LATB9 LATB8 LATB7 LATB6 LATB5 LATB4 LATB3 LATB2 LATB1 LATB0' width='1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1')
    bit (tag=scl names='LATB' width='16')
sfr (key=ODCB addr=0x2ce size=2 access='rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw')
    reset (por='0000000000000000' mclr='0000000000000000')
    bit (names='ODB15 ODB14 ODB13 ODB12 ODB11 ODB10 ODB9 ODB8 ODB7 ODB6 ODB5 ODB4 ODB3 ODB2 ODB1 ODB0' width='1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1')
    bit (tag=scl names='ODCB' width='16')
UnusedRegs (0x2d0-0x2fb)
sfr (key=PADCFG1 addr=0x2fc size=2 access='u u u u u u rw rw u u u u u u u u')
    reset (por='------xx--------' mclr='------xx--------')
    bit (names='- - - - - - SDA1DIS SCK1DIS - - - - - - - -' width='1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1')
UnusedRegs (0x2fe-0x2ff)
sfr (key=ADC1BUF0 addr=0x300 size=2 access='r r r r r r r r r r r r r r r r')
    reset (por='xxxxxxxxxxxxxxxx' mclr='xxxxxxxxxxxxxxxx')
    bit (names='ADC1BUF0' width='16')
    stimulus (scl=rb regfiles=r)
sfr (key=ADC1BUF1 addr=0x302 size=2 access='r r r r r r r r r r r r r r r r')
    reset (por='xxxxxxxxxxxxxxxx' mclr='xxxxxxxxxxxxxxxx')
    bit (names='ADC1BUF1' width='16')
    stimulus (scl=rb regfiles=r)
sfr (key=ADC1BUF2 addr=0x304 size=2 access='r r r r r r r r r r r r r r r r')
    reset (por='xxxxxxxxxxxxxxxx' mclr='xxxxxxxxxxxxxxxx')
    bit (names='ADC1BUF2' width='16')
    stimulus (scl=rb regfiles=r)
sfr (key=ADC1BUF3 addr=0x306 size=2 access='r r r r r r r r r r r r r r r r')
    reset (por='xxxxxxxxxxxxxxxx' mclr='xxxxxxxxxxxxxxxx')
    bit (names='ADC1BUF3' width='16')
    stimulus (scl=rb regfiles=r)
sfr (key=ADC1BUF4 addr=0x308 size=2 access='r r r r r r r r r r r r r r r r')
    reset (por='xxxxxxxxxxxxxxxx' mclr='xxxxxxxxxxxxxxxx')
    bit (names='ADC1BUF4' width='16')
    stimulus (scl=rb regfiles=r)
sfr (key=ADC1BUF5 addr=0x30a size=2 access='r r r r r r r r r r r r r r r r')
    reset (por='xxxxxxxxxxxxxxxx' mclr='xxxxxxxxxxxxxxxx')
    bit (names='ADC1BUF5' width='16')
    stimulus (scl=rb regfiles=r)
sfr (key=ADC1BUF6 addr=0x30c size=2 access='r r r r r r r r r r r r r r r r')
    reset (por='xxxxxxxxxxxxxxxx' mclr='xxxxxxxxxxxxxxxx')
    bit (names='ADC1BUF6' width='16')
    stimulus (scl=rb regfiles=r)
sfr (key=ADC1BUF7 addr=0x30e size=2 access='r r r r r r r r r r r r r r r r')
    reset (por='xxxxxxxxxxxxxxxx' mclr='xxxxxxxxxxxxxxxx')
    bit (names='ADC1BUF7' width='16')
    stimulus (scl=rb regfiles=r)
sfr (key=ADC1BUF8 addr=0x310 size=2 access='r r r r r r r r r r r r r r r r')
    reset (por='xxxxxxxxxxxxxxxx' mclr='xxxxxxxxxxxxxxxx')
    bit (names='ADC1BUF8' width='16')
    stimulus (scl=rb regfiles=r)
sfr (key=ADC1BUF9 addr=0x312 size=2 access='r r r r r r r r r r r r r r r r')
    reset (por='xxxxxxxxxxxxxxxx' mclr='xxxxxxxxxxxxxxxx')
    bit (names='ADC1BUF9' width='16')
    stimulus (scl=rb regfiles=r)
sfr (key=ADC1BUF10 addr=0x314 size=2 access='r r r r r r r r r r r r r r r r')
    reset (por='xxxxxxxxxxxxxxxx' mclr='xxxxxxxxxxxxxxxx')
    bit (names='ADC1BUF10' width='16')
    stimulus (scl=rb regfiles=r)
sfr (key=ADC1BUF11 addr=0x316 size=2 access='r r r r r r r r r r r r r r r r')
    reset (por='xxxxxxxxxxxxxxxx' mclr='xxxxxxxxxxxxxxxx')
    bit (names='ADC1BUF11' width='16')
    stimulus (scl=rb regfiles=r)
sfr (key=ADC1BUF12 addr=0x318 size=2 access='r r r r r r r r r r r r r r r r')
    reset (por='xxxxxxxxxxxxxxxx' mclr='xxxxxxxxxxxxxxxx')
    bit (names='ADC1BUF12' width='16')
    stimulus (scl=rb regfiles=r)
sfr (key=ADC1BUF13 addr=0x31a size=2 access='r r r r r r r r r r r r r r r r')
    reset (por='xxxxxxxxxxxxxxxx' mclr='xxxxxxxxxxxxxxxx')
    bit (names='ADC1BUF13' width='16')
    stimulus (scl=rb regfiles=r)
sfr (key=ADC1BUF14 addr=0x31c size=2 access='r r r r r r r r r r r r r r r r')
    reset (por='xxxxxxxxxxxxxxxx' mclr='xxxxxxxxxxxxxxxx')
    bit (names='ADC1BUF14' width='16')
sfr (key=ADC1BUF15 addr=0x31e size=2 access='r r r r r r r r r r r r r r r r')
    reset (por='xxxxxxxxxxxxxxxx' mclr='xxxxxxxxxxxxxxxx')
    bit (names='ADC1BUF15' width='16')
sfr (key=ADC1BUF16 addr=0x320 size=2 access='r r r r r r r r r r r r r r r r')
    reset (por='xxxxxxxxxxxxxxxx' mclr='xxxxxxxxxxxxxxxx')
    bit (names='ADC1BUF16' width='16')
sfr (key=ADC1BUF17 addr=0x322 size=2 access='r r r r r r r r r r r r r r r r')
    reset (por='xxxxxxxxxxxxxxxx' mclr='xxxxxxxxxxxxxxxx')
    bit (names='ADC1BUF17' width='16')
sfr (key=ADC1BUF18 addr=0x324 size=2 access='r r r r r r r r r r r r r r r r')
    reset (por='xxxxxxxxxxxxxxxx' mclr='xxxxxxxxxxxxxxxx')
    bit (names='ADC1BUF18' width='16')
sfr (key=ADC1BUF19 addr=0x326 size=2 access='r r r r r r r r r r r r r r r r')
    reset (por='xxxxxxxxxxxxxxxx' mclr='xxxxxxxxxxxxxxxx')
    bit (names='ADC1BUF19' width='16')
sfr (key=ADC1BUF20 addr=0x328 size=2 access='r r r r r r r r r r r r r r r r')
    reset (por='xxxxxxxxxxxxxxxx' mclr='xxxxxxxxxxxxxxxx')
    bit (names='ADC1BUF20' width='16')
sfr (key=ADC1BUF21 addr=0x32a size=2 access='r r r r r r r r r r r r r r r r')
    reset (por='xxxxxxxxxxxxxxxx' mclr='xxxxxxxxxxxxxxxx')
    bit (names='ADC1BUF21' width='16')
sfr (key=ADC1BUF22 addr=0x32c size=2 access='r r r r r r r r r r r r r r r r')
    reset (por='xxxxxxxxxxxxxxxx' mclr='xxxxxxxxxxxxxxxx')
    bit (names='ADC1BUF22' width='16')
sfr (key=ADC1BUF23 addr=0x32e size=2 access='r r r r r r r r r r r r r r r r')
    reset (por='xxxxxxxxxxxxxxxx' mclr='xxxxxxxxxxxxxxxx')
    bit (names='ADC1BUF23' width='16')
UnusedRegs (0x330-0x33f)
sfr (key=AD1CON1 addr=0x340 size=2 access='rw u rw u u rw rw rw rw rw rw rw u rw rw rc')
    reset (por='0-0--0000000-000' mclr='0-0--0000000-000')
    bit (names='ADON - ADSIDL - - MODE12 FORM SSRC - ASAM SAMP DONE' width='1 1 1 1 1 1 2 4 1 1 1 1')
    stimulus (scl=rwb)
    freeze (name='ADC 1' bit=14 polarity=1)
sfr (key=AD1CON2 addr=0x342 size=2 access='rw rw rw rw rw rw u u r rw rw rw rw rw rw rw')
    reset (por='000000--00000000' mclr='000000--00000000')
    bit (names='PVCFG NVCFG0 OFFCAL BUFREGEN CSCNA - - BUFS SMPI BUFM ALTS' width='2 1 1 1 1 1 1 1 5 1 1')
    stimulus (scl=rwb)
sfr (key=AD1CON3 addr=0x344 size=2 access='rw rw u rw rw rw rw rw rw rw rw rw rw rw rw rw')
    reset (por='00-0000000000000' mclr='00-0000000000000')
    bit (names='ADRC EXTSAM - SAMC ADCS' width='1 1 1 5 8')
    stimulus (scl=rwb)
UnusedRegs (0x346-0x347)
sfr (key=AD1CHS addr=0x348 size=2 access='rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw')
    reset (por='0000000000000000' mclr='0000000000000000')
    bit (names='CH0NB CH0SB CH0NA CH0SA' width='3 5 3 5')
    stimulus (scl=rwb)
UnusedRegs (0x34a-0x34d)
sfr (key=AD1CSSH addr=0x34e size=2 access='u rw rw rw rw rw u u rw rw rw rw rw rw rw rw')
    reset (por='-00000--00000000' mclr='-00000--00000000')
    bit (names='- CSS30 CSS29 CSS28 CSS27 CSS26 - - CSS23 CSS22 CSS21 CSS20 CSS19 CSS18 CSS17 CSS16' width='1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1')
    stimulus (scl=rwb)
sfr (key=AD1CSSL addr=0x350 size=2 access='rw rw rw rw rw rw rw u u u rw rw rw rw rw rw')
    reset (por='0000000---000000' mclr='0000000---000000')
    bit (names='CSS15 CSS14 CSS13 CSS12 CSS11 CSS10 CSS9 - - - CSS5 CSS4 CSS3 CSS2 CSS1 CSS0' width='1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1')
    stimulus (scl=rwb)
UnusedRegs (0x352-0x353)
sfr (key=AD1CON5 addr=0x354 size=2 access='rw rw rw rw u u rw rw u u u u rw rw rw rw')
    reset (por='0000--00----0000' mclr='0000--00----0000')
    bit (names='ASEN LPEN CTMREQ BGREQ - - ASINT - - - - WM CM' width='1 1 1 1 1 1 2 1 1 1 1 2 2')
sfr (key=AD1CHITH addr=0x356 size=2 access='u u u u u u u u rw rw rw rw rw rw rw rw')
    reset (por='--------00000000' mclr='--------00000000')
    bit (names='- - - - - - - - CHH23 CHH22 CHH21 CHH20 CHH19 CHH18 CHH17 CHH16' width='1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1')
sfr (key=AD1CHITL addr=0x358 size=2 access='rw rw rw rw rw rw rw u u u rw rw rw rw rw rw')
    reset (por='0000000---000000' mclr='0000000---000000')
    bit (names='CHH15 CHH14 CHH13 CHH12 CHH11 CHH10 CHH9 - - - CHH5 CHH4 CHH3 CHH2 CHH1 CHH0' width='1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1')
sfr (key=CTMUCON1L addr=0x35a size=2 access='rw u rw rw rw rw rw rw rw rw rw rw rw rw rw rw')
    reset (por='0-00000000000000' mclr='0-00000000000000')
    bit (names='CTMUEN - CTMUSIDL TGEN EDGEN EDGSEQEN IDISSEN CTTRIG ITRIM IRNG' width='1 1 1 1 1 1 1 1 6 2')
    stimulus (scl=rwb)
    freeze (name='CTMU' bit=14 polarity=1)
sfr (key=CTMUCON1H addr=0x35c size=2 access='rw rw rw rw rw rw rw rw rw rw rw rw rw rw u u')
    reset (por='00000000000000--' mclr='00000000000000--')
    bit (names='EDG1MOD EDG1POL EDG1SEL EDG2STAT EDG1STAT EDG2MOD EDG2POL EDG2SEL - -' width='1 1 4 1 1 1 1 4 1 1')
    stimulus (scl=rwb)
sfr (key=CTMUCON2L addr=0x35e size=2 access='u u u u u u u u u u u rw u rw rw rw')
    reset (por='-----------0-000' mclr='-----------0-000')
    bit (names='- - - - - - - - - - - IRSTEN - DISCHS' width='1 1 1 1 1 1 1 1 1 1 1 1 1 3')
    stimulus (scl=rwb)
sfr (key=AD1CTMENH addr=0x360 size=2 access='u u u u u u u u rw rw rw rw rw rw rw rw')
    reset (por='--------00000000' mclr='--------00000000')
    bit (names='- - - - - - - - CTMEN23 CTMEN22 CTMEN21 CTMEN20 CTMEN19 CTMEN18 CTMEN17 CTMEN16' width='1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1')
sfr (key=AD1CTMENL addr=0x362 size=2 access='rw rw rw rw rw rw rw u u u rw rw rw rw rw rw')
    reset (por='0000000---000000' mclr='0000000---000000')
    bit (names='CTMEN15 CTMEN14 CTMEN13 CTMEN12 CTMEN11 CTMEN10 CTMEN9 - - - CTMEN5 CTMEN4 CTMEN3 CTMEN2 CTMEN1 CTMEN0' width='1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1')
UnusedRegs (0x364-0x4df)
sfr (key=ANSA addr=0x4e0 size=2 access='u u u u u u u u u u u rw rw rw rw rw')
    reset (por='-----------11111' mclr='-----------11111')
    bit (names='- - - - - - - - - - - ANSA4 ANSA3 ANSA2 ANSA1 ANSA0' width='1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1')
    bit (tag=scl names='ANSA' width='16')
sfr (key=ANSB addr=0x4e2 size=2 access='rw rw rw rw u u rw rw rw rw rw rw rw rw rw rw')
    reset (por='1111--1111111111' mclr='1111--1111111111')
    bit (names='ANSB15 ANSB14 ANSB13 ANSB12 - - ANSB9 ANSB8 ANSB7 ANSB6 ANSB5 ANSB4 ANSB3 ANSB2 ANSB1 ANSB0' width='1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1')
    bit (tag=scl names='ANSB' width='16')
UnusedRegs (0x4e4-0x62f)
sfr (key=CMSTAT addr=0x630 size=2 access='rw u u u u u u rw u u u u u u u rw')
    reset (por='x------x-------x' mclr='x------x-------x')
    bit (names='CMIDL - - - - - - C1EVT - - - - - - - C1OUT' width='1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1')
    freeze (name='Comparators' bit=14 polarity=1)
sfr (key=CVRCON addr=0x632 size=2 access='u u u u u u u u rw rw rw rw rw rw rw rw')
    reset (por='--------xxxxxxxx' mclr='--------xxxxxxxx')
    bit (names='- - - - - - - - CVREN CVROE CVRSS CVR' width='1 1 1 1 1 1 1 1 1 1 1 5')
sfr (key=CM1CON addr=0x634 size=2 access='rw rw rw rw u u rw rw rw rw rw rw u u rw rw')
    reset (por='xxxx--xxxxxx--xx' mclr='xxxx--xxxxxx--xx')
    bit (names='CON COE CPOL CLPWR - - CEVT COUT EVPOL CREF - - CCH' width='1 1 1 1 1 1 1 1 2 2 1 1 2')
UnusedRegs (0x636-0x66f)
sfr (key=BUFCON0 addr=0x670 size=2 access='u u u u u u u u u u u u u u rw rw')
    reset (por='--------------00' mclr='--------------00')
    bit (names='- - - - - - - - - - - - - - BUFREF' width='1 1 1 1 1 1 1 1 1 1 1 1 1 1 2')
UnusedRegs (0x672-0x73f)
sfr (key=RCON addr=0x740 size=2 access='rw rw rw u u u rw rw rw rw rw rw rw rw rw rw')
    reset (por='00x---0000000011' mclr='uux---u01u0uuuuu')
    bit (names='TRAPR IOPUWR SBOREN - - - CM PMSLP EXTR SWR SWDTEN WDTO SLEEP IDLE BOR POR' width='1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1')
    stimulus (scl=r)
sfr (key=OSCCON addr=0x742 size=2 access='u r r r u rw rw rw rw u r u rc rw rw rw')
    reset (por='-qqq-qqq0-q00000' mclr='-qqq-qqq0-q00000')
    bit (names='- COSC - NOSC CLKLOCK - LOCK - CF SOSCDRV SOSCEN OSWEN' width='1 3 1 3 1 1 1 1 1 1 1 1')
sfr (key=CLKDIV addr=0x744 size=2 access='rw rw rw rw rw rw rw rw u u u u u u u u')
    reset (por='00000001--------' mclr='00000001--------')
    bit (names='ROI DOZE DOZEN RCDIV - - - - - - - -' width='1 3 1 3 1 1 1 1 1 1 1 1')
UnusedRegs (0x746-0x747)
sfr (key=OSCTUN addr=0x748 size=2 access='u u u u u u u u u u rw rw rw rw rw rw')
    reset (por='----------000000' mclr='----------000000')
    bit (names='- - - - - - - - - - TUN' width='1 1 1 1 1 1 1 1 1 1 6')
UnusedRegs (0x74a-0x74d)
sfr (key=REFOCON addr=0x74e size=2 access='rw u rw rw rw rw rw rw u u u u u u u u')
    reset (por='0-000000--------' mclr='0-000000--------')
    bit (names='ROEN - ROSSLP ROSEL RODIV - - - - - - - -' width='1 1 1 1 4 1 1 1 1 1 1 1 1')
    freeze (name='REFO Clock' bit=14 polarity=1)
UnusedRegs (0x750-0x755)
sfr (key=HLVDCON addr=0x756 size=2 access='rw u rw u u u u u rw rw rw u rw rw rw rw')
    reset (por='0-0-----000-0000' mclr='0-0-----000-0000')
    bit (names='HLVDEN - LSIDL - - - - - VDIR BGVST IRVST - HLVDL' width='1 1 1 1 1 1 1 1 1 1 1 1 4')
    freeze (name='HLVD' bit=14 polarity=1)
UnusedRegs (0x758-0x75f)
sfr (key=NVMCON addr=0x760 size=2 access='rs rw rw rw u u u u u rw rw rw rw rw rw rw')
    reset (por='0000-----0000000' mclr='0000-----0xxxxxx')
    bit (names='WR WREN WRERR PGMONLY - - - - - ERASE NVMOP' width='1 1 1 1 1 1 1 1 1 1 6')
    stimulus (scl=r)
UnusedRegs (0x762-0x765)
sfr (key=NVMKEY addr=0x766 size=2 access='u u u u u u u u w w w w w w w w')
    reset (por='--------00000000' mclr='--------00000000')
    bit (names='- - - - - - - - NVMKEY' width='1 1 1 1 1 1 1 1 8')
    stimulus (scl=r)
sfr (key=ULPWCON addr=0x768 size=2 access='rw u rw u u u u rw u u u u u u u u')
    reset (por='0-0----0--------' mclr='0-0----0--------')
    bit (names='ULPEN - ULPSIDL - - - - ULPSINK - - - - - - - -' width='1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1')
    freeze (name='ULPWU' bit=14 polarity=1)
UnusedRegs (0x76a-0x76f)
sfr (key=PMD1 addr=0x770 size=2 access='u u u u rw u u u rw u rw u u u u rw')
    reset (por='----x---x-x----x' mclr='----x---x-x----x')
    bit (names='- - - - T1MD - - - SSP1MD - U1MD - - - - ADC1MD' width='1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1')
sfr (key=PMD2 addr=0x772 size=2 access='u u u u u u u u u u u u u u rw rw')
    reset (por='--------------xx' mclr='--------------xx')
    bit (names='- - - - - - - - - - - - - - CCP2MD CCP1MD' width='1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1')
sfr (key=PMD3 addr=0x774 size=2 access='u u u u u rw u u u u u u u u u u')
    reset (por='-----x----------' mclr='-----x----------')
    bit (names='- - - - - CMPMD - - - - - - - - - -' width='1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1')
sfr (key=PMD4 addr=0x776 size=2 access='u u u u u u u u u rw u u rw rw rw u')
    reset (por='---------x--xxx-' mclr='---------x--xxx-')
    bit (names='- - - - - - - - - ULPWUMD - - REFOMD CTMUMD HLVDMD -' width='1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1')
UnusedRegs (0x778-0x77d)
sfr (key=PMD8 addr=0x77e size=2 access='u u u u u u u u u u u u u rw u u')
    reset (por='-------------x--' mclr='-------------x--')
    bit (names='- - - - - - - - - - - - - CLC1MD - -' width='1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1')
sfr (key=FEXL addr=0x780 size=2 flags=h access='rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw')
    reset (por='0000000000000000' mclr='0000000000000000')
    bit (names='FEXL' width='16')
    stimulus (scl=r type=int)
sfr (key=FEXU addr=0x782 size=2 flags=h access='u u u u u u u u rw rw rw rw rw rw rw rw')
    reset (por='--------00000000' mclr='--------00000000')
    bit (names='- - - - - - - - FEXU' width='1 1 1 1 1 1 1 1 8')
sfr (key=VISI addr=0x784 size=2 flags=h access='rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw')
    reset (por='0000000000000000' mclr='0000000000000000')
    bit (names='VISI' width='16')
    stimulus (scl=r type=int)
sfr (key=DPCL addr=0x786 size=2 flags=h access='rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw')
    reset (por='0000000000000000' mclr='0000000000000000')
    bit (names='DPCL' width='16')
    stimulus (scl=r type=int)
sfr (key=DPCH addr=0x788 size=2 flags=h access='u u u u u u u u rw rw rw rw rw rw rw rw')
    reset (por='--------00000000' mclr='--------00000000')
    bit (names='- - - - - - - - DPCH' width='1 1 1 1 1 1 1 1 8')
UnusedRegs (0x78a-0x7ff)

######################################################################
#
# Configuration Registers
#
######################################################################

cfgbits (key=FBS addr=0xf80000 unused=0x0)
    field (key=BWRP mask=0x1 desc="Boot Segment Write Protect")
        setting (req=0x1 value=0x1 desc="Disabled")
        setting (req=0x1 value=0x0 desc="Enabled")
    field (key=BSS mask=0xe desc="Boot segment Protect")
        setting (req=0xe value=0xe desc="Disabled")
        setting (req=0xe value=0xc desc="Standard Security Boot Protect 000200h - 000AFEh")
        setting (req=0xe value=0xa desc="Standard Security Boot Protect 000200h - 0015FEh")
        setting (req=0xe value=0x4 desc="High Security Boot Protect 000200h - 000AFEh")
        setting (req=0xe value=0x2 desc="High Security Boot Protect 000200h - 0015FEh")
cfgbits (key=FGS addr=0xf80004 unused=0x0)
    field (key=GWRP mask=0x1 desc="General Segment Write Protect")
        setting (req=0x1 value=0x1 desc="Disabled")
        setting (req=0x1 value=0x0 desc="Enabled")
    field (key=GCP mask=0x2 desc="General Segment Code Protect")
        setting (req=0x2 value=0x2 desc="Disabled")
            checksum (type=0x0 protregion=0x0-0x0)
        setting (req=0x2 value=0x0 desc="Enabled")
            checksum (type=0x80 protregion=0x0-0x2bfe)
cfgbits (key=FOSCSEL addr=0xf80006 unused=0x0)
    field (key=FNOSC mask=0x7 desc="Oscillator Select")
        setting (req=0x7 value=0x7 desc="8MHz FRC oscillator With Postscaler (FRCDIV)")
        setting (req=0x7 value=0x6 desc="500kHz Low-Power FRC oscillator with Postscaler(LPFRCDIV)")
        setting (req=0x7 value=0x5 desc="Low Power RC oscillator (LPRC)")
        setting (req=0x7 value=0x4 desc="Secondary oscillator (SOSC)")
        setting (req=0x7 value=0x3 desc="Primary oscillator with PLL Module (HS+PLL, EC+PLL)")
        setting (req=0x7 value=0x2 desc="Primary Oscillator (XT, HS, EC)")
        setting (req=0x7 value=0x1 desc="Fast RC Oscillator with Postscaler and PLL Module (FRCDIV+PLL)")
        setting (req=0x7 value=0x0 desc="Fast RC Oscillator (FRC)")
    field (key=SOSCSRC mask=0x20 desc="SOSC Source Type")
        setting (req=0x20 value=0x20 desc="Analog Mode for use with crystal")
        setting (req=0x20 value=0x0 desc="Digital Mode for use with external source")
    field (key=LPRCSEL mask=0x40 desc="LPRC Oscillator Power and Accuracy")
        setting (req=0x40 value=0x40 desc="High Power, High Accuracy Mode")
        setting (req=0x40 value=0x0 desc="Low Power, Low Accuracy Mode")
    field (key=IESO mask=0x80 desc="Internal External Switch Over bit")
        setting (req=0x80 value=0x80 desc="Enabled")
        setting (req=0x80 value=0x0 desc="Disabled")
cfgbits (key=FOSC addr=0xf80008 unused=0x0)
    field (key=POSCMOD mask=0x3 desc="Primary Oscillator Configuration bits")
        setting (req=0x3 value=0x3 desc="Primary oscillator disabled")
        setting (req=0x3 value=0x2 desc="HS oscillator mode selected")
        setting (req=0x3 value=0x1 desc="XT oscillator mode selected")
        setting (req=0x3 value=0x0 desc="External clock mode selected")
    field (key=OSCIOFNC mask=0x4 desc="CLKO Enable Configuration bit")
        setting (req=0x4 value=0x4 desc="CLKO output signal enabled")
        setting (req=0x4 value=0x0 desc="Port I/O enabled (CLKO disabled)")
    field (key=POSCFREQ mask=0x18 desc="Primary Oscillator Frequency Range Configuration bits")
        setting (req=0x18 value=0x18 desc="Primary oscillator/external clock input frequency greater than 8MHz")
        setting (req=0x18 value=0x10 desc="Primary oscillator/external clock input frequency between 100kHz and 8MHz")
        setting (req=0x18 value=0x8 desc="Primary oscillator/external clock input frequency less than 100kHz")
    field (key=SOSCSEL mask=0x20 desc="SOSC Power Selection Configuration bits")
        setting (req=0x20 value=0x20 desc="Secondary Oscillator configured for high-power operation")
        setting (req=0x20 value=0x0 desc="Secondary Oscillator configured for low-power operation")
    field (key=FCKSM mask=0xc0 desc="Clock Switching and Monitor Selection")
        setting (req=0x80 value=0x80 desc="Both Clock Switching and Fail-safe Clock Monitor are disabled")
        setting (req=0xc0 value=0x40 desc="Clock Switching is enabled, Fail-safe Clock Monitor is disabled")
        setting (req=0xc0 value=0x0 desc="Both Clock Switching and Fail-safe Clock Monitor are enabled")
cfgbits (key=FWDT addr=0xf8000a unused=0x0)
    field (key=WDTPS mask=0xf desc="Watchdog Timer Postscale Select bits")
        setting (req=0xf value=0xf desc="1:32768")
        setting (req=0xf value=0xe desc="1:16384")
        setting (req=0xf value=0xd desc="1:8192")
        setting (req=0xf value=0xc desc="1:4096")
        setting (req=0xf value=0xb desc="1:2048")
        setting (req=0xf value=0xa desc="1:1024")
        setting (req=0xf value=0x9 desc="1:512")
        setting (req=0xf value=0x8 desc="1:256")
        setting (req=0xf value=0x7 desc="1:128")
        setting (req=0xf value=0x6 desc="1:64")
        setting (req=0xf value=0x5 desc="1:32")
        setting (req=0xf value=0x4 desc="1:16")
        setting (req=0xf value=0x3 desc="1:8")
        setting (req=0xf value=0x2 desc="1:4")
        setting (req=0xf value=0x1 desc="1:2")
        setting (req=0xf value=0x0 desc="1:1")
    field (key=FWPSA mask=0x10 desc="WDT Prescaler bit")
        setting (req=0x10 value=0x10 desc="WDT prescaler ratio of 1:128")
        setting (req=0x10 value=0x0 desc="WDT prescaler ratio of 1:32")
    field (key=FWTEN0 mask=0xa0 desc="Watchdog Timer Enable bits")
        setting (req=0xa0 value=0x0 desc="Disabled")
        setting (req=0xa0 value=0x20 desc="WDT enabled while device is active and disabled in Sleep; SWDTEN bit disabled")
        setting (req=0xa0 value=0x80 desc="WDT controlled with the SWDTEN bit setting")
        setting (req=0xa0 value=0xa0 desc="Enabled")
    field (key=WINDIS mask=0x40 desc="Windowed Watchdog Timer Disable bit")
        setting (req=0x40 value=0x40 desc="Disabled")
        setting (req=0x40 value=0x0 desc="Enabled")
cfgbits (key=FPOR addr=0xf8000c unused=0x0)
    field (key=BOREN mask=0x3 desc="Brown-out Reset Enable bits")
        setting (req=0x3 value=0x3 desc="Brown-out Reset enabled in hardware, SBOREN bit disabled")
        setting (req=0x3 value=0x2 desc="Brown-out Reset enabled only while device is active and disabled in SLEEP, SBOREN bit disabled")
        setting (req=0x3 value=0x1 desc="Brown-out Rest controlled by SBOREN bit")
        setting (req=0x3 value=0x0 desc="Brown-out Reset disabled in hardware, SBOREN bit disabled")
    field (key=RES0 mask=0x4 desc="Reserved" flags=h)
        setting (req=0x4 value=0x4 desc="Reserved")
    field (key=PWRTEN mask=0x8 desc="Power-up Timer Enable bit")
        setting (req=0x8 value=0x0 desc="Disabled")
        setting (req=0x8 value=0x8 desc="Enabled")
    field (key=I2C1SEL mask=0x10 desc="Alternate I2C1 Pin Mapping bit")
        setting (req=0x10 value=0x10 desc="Use Default SCL1/SDA1 Pins For I2C1")
        setting (req=0x10 value=0x0 desc="Use  Alternate ASCL1/ASDA1 Pins For I2C1")
    field (key=BORV mask=0x60 desc="Brown-out Reset Voltage bits")
        setting (req=0x60 value=0x60 desc="Brown-out Reset set to lowest voltage (1.8V)")
        setting (req=0x60 value=0x40 desc="Brown-out Reset set at 2.7V")
        setting (req=0x60 value=0x20 desc="Brown-out Reset set to Highest Voltage (3.0V)")
        setting (req=0x60 value=0x0 desc="Low-power Brown-Out Reset occurs around 2.0V")
    field (key=MCLRE mask=0x80 desc="MCLR Pin Enable bit")
        setting (req=0x80 value=0x80 desc="Enabled")
        setting (req=0x80 value=0x0 desc="Disabled")
cfgbits (key=FICD addr=0xf8000e unused=0x0)
    field (key=ICS mask=0x3 desc="ICD Pin Placement Select bits")
        setting (req=0x3 value=0x3 desc="EMUC/EMUD share PGC1/PGD1")
        setting (req=0x3 value=0x2 desc="EMUC/EMUD share PGC2/PGD2")
        setting (req=0x3 value=0x1 desc="EMUC/EMUD share PGC3/PGD3")
    field (key=BKBUG mask=0x80 desc="Background Debugger Enable bit" flags=h)
        setting (req=0x80 value=0x80 desc="Disabled")
        setting (req=0x80 value=0x0 desc="Enabled")
