// File: 18f442_g.lkr
// Generic linker script for the PIC18F442 processor

#DEFINE _CODEEND _DEBUGCODESTART - 1
#DEFINE _CEND _CODEEND + _DEBUGCODELEN
#DEFINE _DATAEND _DEBUGDATASTART - 1
#DEFINE _DEND _DATAEND + _DEBUGDATALEN

LIBPATH .

#IFDEF _CRUNTIME
  FILES c018i.o
  FILES clib.lib
  FILES p18f442.lib
#FI

#IFDEF _DEBUGCODESTART
  CODEPAGE   NAME=page       START=0x0               END=_CODEEND
  CODEPAGE   NAME=debug      START=_DEBUGCODESTART   END=_CEND        PROTECTED
#ELSE
  CODEPAGE   NAME=page       START=0x0               END=0x3FFF
#FI

CODEPAGE   NAME=idlocs     START=0x200000          END=0x200007       PROTECTED
CODEPAGE   NAME=config     START=0x300000          END=0x30000D       PROTECTED
CODEPAGE   NAME=devid      START=0x3FFFFE          END=0x3FFFFF       PROTECTED
CODEPAGE   NAME=eedata     START=0xF00000          END=0xF000FF       PROTECTED

ACCESSBANK NAME=accessram  START=0x0               END=0x7F
ACCESSBANK NAME=accesssfr  START=0xF80             END=0xFFF          PROTECTED
DATABANK   NAME=gpr0       START=0x80              END=0xFF
DATABANK   NAME=gpr1       START=0x100             END=0x1FF

#IFDEF _DEBUGDATASTART
  DATABANK   NAME=gpr2       START=0x200             END=_DATAEND
  DATABANK   NAME=dbgspr     START=_DEBUGDATASTART   END=_DEND           PROTECTED
#ELSE //no debug
  DATABANK   NAME=gpr2       START=0x200             END=0x2FF
#FI


#IFDEF _CRUNTIME
  SECTION    NAME=CONFIG     ROM=config
  #IFDEF _DEBUGDATASTART
    STACK SIZE=0x100 RAM=gpr1
  #ELSE
    STACK SIZE=0x100 RAM=gpr2
  #FI
#FI
