######################################################################
#
# MPLAB IDE .dev File Generated by `pic2dev.py'
#
# Device: PIC18F6720
# Family: 18xxxx
# Datasheet: 30609
# Programming Spec: 39583
# Date: Tue Apr 30 09:44:46 2013
#
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#
# Memory Regions & Other General Device Information
#
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vpp (range=9.000-13.250 dflt=13.000)
vdd (range=2.125-5.500 dfltrange=4.250-5.500 nominal=5.000)
pgming (memtech=ee tries=1 lvpthresh=4.500 panelsize=0x2000)
    wait (pgm=1000 eedata=4000 cfg=5000 userid=5000 erase=10000 lvpgm=1000 lverase=1000)
    latches (pgm=8 eedata=2 cfg=2 userid=8 rowerase=64)
HWStackDepth=31
breakpoints (numhwbp=1 datacapture=false idbyte=p)
testmem (region=0x200000-0x20003f)
userid (region=0x200000-0x200007)
cfgmem (region=0x300000-0x30000d)
devid (region=0x3ffffe-0x3fffff idmask=0xffe0 id=0x620)
    ver (id=0x621 desc="a1")
    ver (id=0x622 desc="a2")
    ver (id=0x623 desc="a3")
    ver (id=0x624 desc="a4")
eedata (region=0x0-0x3ff)
bkbgvectmem (region=0x200028-0x200037)
pgmmem (region=0x0-0x1ffff)
NumBanks=16
UnusedBankMask=0x0
AccessBankSplitOffset=0x60
UnusedRegs (0xf00-0xf5f)

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#
# Special Function Registers
#
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UnusedRegs (0xf60-0xf6a)
sfr (key=RCSTA2 addr=0xf6b size=1 access='rw rw rw rw rw r r r')
    reset (por='0000000x' mclr='0000000x')
    bit (names='SPEN RX9 SREN CREN ADDEN FERR OERR RX9D' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb regfiles=w)
sfr (key=TXSTA2 addr=0xf6c size=1 access='rw rw rw rw u rw r rw')
    reset (por='0000-010' mclr='0000-010')
    bit (names='CSRC TX9 TXEN SYNC - BRGH TRMT TX9D' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb regfiles=w)
sfr (key=TXREG2 addr=0xf6d size=1 access='w w w w w w w w')
    reset (por='00000000' mclr='00000000')
    bit (names='TXREG2' width='8')
    stimulus (scl=rwb regfiles=w)
sfr (key=RCREG2 addr=0xf6e size=1 access='r r r r r r r r')
    reset (por='00000000' mclr='00000000')
    bit (names='RCREG2' width='8')
    stimulus (scl=rwb regfiles=rp)
sfr (key=SPBRG2 addr=0xf6f size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='SPBRG2' width='8')
    stimulus (scl=rwb regfiles=w)
sfr (key=CCP5CON addr=0xf70 size=1 access='u u rw rw rw rw rw rw')
    reset (por='--000000' mclr='--000000')
    bit (names='- - DC5B CCP5M' width='1 1 2 4')
    stimulus (scl=rwb regfiles=w)
sfr (key=CCPR5 addr=0xf71 size=2 flags=j)
    bit (names='CCPR5' width='16')
sfr (key=CCPR5L addr=0xf71 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='CCPR5L' width='8')
    stimulus (scl=rwb regfiles=w type=int)
sfr (key=CCPR5H addr=0xf72 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='CCPR5H' width='8')
    stimulus (scl=rwb regfiles=w type=int)
sfr (key=CCP4CON addr=0xf73 size=1 access='u u rw rw rw rw rw rw')
    reset (por='--000000' mclr='--000000')
    bit (names='- - DC4B CCP4M' width='1 1 2 4')
    stimulus (scl=rwb regfiles=w)
sfr (key=CCPR4 addr=0xf74 size=2 flags=j)
    bit (names='CCPR4' width='16')
sfr (key=CCPR4L addr=0xf74 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='CCPR4L' width='8')
    stimulus (scl=rwb regfiles=w type=int)
sfr (key=CCPR4H addr=0xf75 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='CCPR4H' width='8')
    stimulus (scl=rwb regfiles=w type=int)
sfr (key=T4CON addr=0xf76 size=1 access='u rw rw rw rw rw rw rw')
    reset (por='-0000000' mclr='-0000000')
    bit (names='- T4OUTPS TMR4ON T4CKPS' width='1 4 1 2')
    stimulus (scl=rwb regfiles=w)
sfr (key=PR4 addr=0xf77 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='11111111' mclr='11111111')
    bit (names='PR4' width='8')
    stimulus (scl=rwb regfiles=w type=int)
sfr (key=TMR4 addr=0xf78 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='TMR4' width='8')
    stimulus (scl=rwb pcfiles=w regfiles=w type=int)
UnusedRegs (0xf79-0xf7f)
sfr (key=PORTA addr=0xf80 size=1 access='u rw rw rw rw rw rw rw')
    reset (por='-x0x0000' mclr='-u0u0000')
    bit (names='- RA6 RA5 RA4 RA3 RA2 RA1 RA0' width='1 1 1 1 1 1 1 1')
    bit (tag=scl names='RA' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=rw)
sfr (key=PORTB addr=0xf81 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='RB7 RB6 RB5 RB4 RB3 RB2 RB1 RB0' width='1 1 1 1 1 1 1 1')
    bit (tag=scl names='RB' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=rw)
sfr (key=PORTC addr=0xf82 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='RC7 RC6 RC5 RC4 RC3 RC2 RC1 RC0' width='1 1 1 1 1 1 1 1')
    bit (tag=scl names='RC' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=rw)
sfr (key=PORTD addr=0xf83 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='RD7 RD6 RD5 RD4 RD3 RD2 RD1 RD0' width='1 1 1 1 1 1 1 1')
    bit (tag=scl names='RD' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=rw)
sfr (key=PORTE addr=0xf84 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='RE7 RE6 RE5 RE4 RE3 RE2 RE1 RE0' width='1 1 1 1 1 1 1 1')
    bit (tag=scl names='RE' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=rw)
sfr (key=PORTF addr=0xf85 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='x0000000' mclr='u0000000')
    bit (names='RF7 RF6 RF5 RF4 RF3 RF2 RF1 RF0' width='1 1 1 1 1 1 1 1')
    bit (tag=scl names='RF' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=rw)
sfr (key=PORTG addr=0xf86 size=1 access='u u u rw rw rw rw rw')
    reset (por='---xxxxx' mclr='---uuuuu')
    bit (names='- - - RG4 RG3 RG2 RG1 RG0' width='1 1 1 1 1 1 1 1')
    bit (tag=scl names='RG' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=rw)
UnusedRegs (0xf87-0xf88)
sfr (key=LATA addr=0xf89 size=1 access='u rw rw rw rw rw rw rw')
    reset (por='-xxxxxxx' mclr='-uuuuuuu')
    bit (names='- LATA6 LATA5 LATA4 LATA3 LATA2 LATA1 LATA0' width='1 1 1 1 1 1 1 1')
    bit (tag=scl names='LATA' width='8')
    stimulus (scl=rwb regfiles=w)
sfr (key=LATB addr=0xf8a size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='LATB7 LATB6 LATB5 LATB4 LATB3 LATB2 LATB1 LATB0' width='1 1 1 1 1 1 1 1')
    bit (tag=scl names='LATB' width='8')
    stimulus (scl=rwb regfiles=w)
sfr (key=LATC addr=0xf8b size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='LATC7 LATC6 LATC5 LATC4 LATC3 LATC2 LATC1 LATC0' width='1 1 1 1 1 1 1 1')
    bit (tag=scl names='LATC' width='8')
    stimulus (scl=rwb regfiles=w)
sfr (key=LATD addr=0xf8c size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='LATD7 LATD6 LATD5 LATD4 LATD3 LATD2 LATD1 LATD0' width='1 1 1 1 1 1 1 1')
    bit (tag=scl names='LATD' width='8')
    stimulus (scl=rwb regfiles=w)
sfr (key=LATE addr=0xf8d size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='LATE7 LATE6 LATE5 LATE4 LATE3 LATE2 LATE1 LATE0' width='1 1 1 1 1 1 1 1')
    bit (tag=scl names='LATE' width='8')
    stimulus (scl=rwb regfiles=w)
sfr (key=LATF addr=0xf8e size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='LATF7 LATF6 LATF5 LATF4 LATF3 LATF2 LATF1 LATF0' width='1 1 1 1 1 1 1 1')
    bit (tag=scl names='LATF' width='8')
    stimulus (scl=rwb regfiles=w)
sfr (key=LATG addr=0xf8f size=1 access='u u u rw rw rw rw rw')
    reset (por='---xxxxx' mclr='---uuuuu')
    bit (names='- - - LATG4 LATG3 LATG2 LATG1 LATG0' width='1 1 1 1 1 1 1 1')
    bit (tag=scl names='LATG' width='8')
    stimulus (scl=rwb regfiles=w)
UnusedRegs (0xf90-0xf91)
sfr (key=TRISA addr=0xf92 size=1 access='u rw rw rw rw rw rw rw')
    reset (por='-1111111' mclr='-1111111')
    bit (names='- TRISA6 TRISA5 TRISA4 TRISA3 TRISA2 TRISA1 TRISA0' width='1 1 1 1 1 1 1 1')
    bit (tag=scl names='TRISA' width='8')
    stimulus (scl=rwb regfiles=w)
sfr (key=TRISB addr=0xf93 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='11111111' mclr='11111111')
    bit (names='TRISB7 TRISB6 TRISB5 TRISB4 TRISB3 TRISB2 TRISB1 TRISB0' width='1 1 1 1 1 1 1 1')
    bit (tag=scl names='TRISB' width='8')
    stimulus (scl=rwb regfiles=w)
sfr (key=TRISC addr=0xf94 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='11111111' mclr='11111111')
    bit (names='TRISC7 TRISC6 TRISC5 TRISC4 TRISC3 TRISC2 TRISC1 TRISC0' width='1 1 1 1 1 1 1 1')
    bit (tag=scl names='TRISC' width='8')
    stimulus (scl=rwb regfiles=w)
sfr (key=TRISD addr=0xf95 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='11111111' mclr='11111111')
    bit (names='TRISD7 TRISD6 TRISD5 TRISD4 TRISD3 TRISD2 TRISD1 TRISD0' width='1 1 1 1 1 1 1 1')
    bit (tag=scl names='TRISD' width='8')
    stimulus (scl=rwb regfiles=w)
sfr (key=TRISE addr=0xf96 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='11111111' mclr='11111111')
    bit (names='TRISE7 TRISE6 TRISE5 TRISE4 TRISE3 TRISE2 TRISE1 TRISE0' width='1 1 1 1 1 1 1 1')
    bit (tag=scl names='TRISE' width='8')
    stimulus (scl=rwb regfiles=w)
sfr (key=TRISF addr=0xf97 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='11111111' mclr='11111111')
    bit (names='TRISF7 TRISF6 TRISF5 TRISF4 TRISF3 TRISF2 TRISF1 TRISF0' width='1 1 1 1 1 1 1 1')
    bit (tag=scl names='TRISF' width='8')
    stimulus (scl=rwb regfiles=w)
sfr (key=TRISG addr=0xf98 size=1 access='u u u rw rw rw rw rw')
    reset (por='---11111' mclr='---11111')
    bit (names='- - - TRISG4 TRISG3 TRISG2 TRISG1 TRISG0' width='1 1 1 1 1 1 1 1')
    bit (tag=scl names='TRISG' width='8')
    stimulus (scl=rwb regfiles=w)
UnusedRegs (0xf99-0xf9c)
sfr (key=PIE1 addr=0xf9d size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='PSPIE ADIE RCIE TXIE SSPIE CCP1IE TMR2IE TMR1IE' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=PIR1 addr=0xf9e size=1 access='rw rw r r rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='PSPIF ADIF RCIF TXIF SSPIF CCP1IF TMR2IF TMR1IF' width='1 1 1 1 1 1 1 1')
    bit (tag=scl names='PSPIF ADIF - - SSPIF CCP1IF TMR2IF TMR1IF' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=IPR1 addr=0xf9f size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='11111111' mclr='11111111')
    bit (names='PSPIP ADIP RCIP TXIP SSPIP CCP1IP TMR2IP TMR1IP' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=PIE2 addr=0xfa0 size=1 access='u rw u rw rw rw rw rw')
    reset (por='-0-00000' mclr='-0-00000')
    bit (names='- CMIE - EEIE BCLIE LVDIE TMR3IE CCP2IE' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=PIR2 addr=0xfa1 size=1 access='u rw u rw rw rw rw rw')
    reset (por='-0-00000' mclr='-0-00000')
    bit (names='- CMIF - EEIF BCLIF LVDIF TMR3IF CCP2IF' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=IPR2 addr=0xfa2 size=1 access='u rw u rw rw rw rw rw')
    reset (por='-1-11111' mclr='-1-11111')
    bit (names='- CMIP - EEIP BCLIP LVDIP TMR3IP CCP2IP' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=PIE3 addr=0xfa3 size=1 access='u u rw rw rw rw rw rw')
    reset (por='--000000' mclr='--000000')
    bit (names='- - RC2IE TX2IE TMR4IE CCP5IE CCP4IE CCP3IE' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=PIR3 addr=0xfa4 size=1 access='u u r r rw rw rw rw')
    reset (por='--000000' mclr='--000000')
    bit (names='- - RC2IF TX2IF TMR4IF CCP5IF CCP4IF CCP3IF' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=IPR3 addr=0xfa5 size=1 access='u u rw rw rw rw rw rw')
    reset (por='--111111' mclr='--111111')
    bit (names='- - RC2IP TX2IP TMR4IP CCP5IP CCP4IP CCP3IP' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=EECON1 addr=0xfa6 size=1 access='rw rw u rw rw rw rs rs')
    reset (por='xx-0x000' mclr='uu-0u000')
    bit (names='EEPGD CFGS - FREE WRERR WREN WR RD' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=EECON2 addr=0xfa7 size=1 access='w w w w w w w w')
    reset (por='--------' mclr='--------')
    bit (names='EECON2' width='8')
sfr (key=EEDATA addr=0xfa8 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='EEDATA' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=rw)
sfr (key=EEADR addr=0xfa9 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='EEADR' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=EEADRH addr=0xfaa size=1 access='u u u u u u rw rw')
    reset (por='------00' mclr='------00')
    bit (names='- - - - - - EEADRH' width='1 1 1 1 1 1 2')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=RCSTA1 addr=0xfab size=1 access='rw rw rw rw rw r r r')
    reset (por='0000000x' mclr='0000000x')
    bit (names='SPEN RX9 SREN CREN ADDEN FERR OERR RX9D' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb regfiles=w)
sfr (key=TXSTA1 addr=0xfac size=1 access='rw rw rw rw u rw r rw')
    reset (por='0000-010' mclr='0000-010')
    bit (names='CSRC TX9 TXEN SYNC - BRGH TRMT TX9D' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb regfiles=w)
sfr (key=TXREG1 addr=0xfad size=1 access='w w w w w w w w')
    reset (por='00000000' mclr='00000000')
    bit (names='TXREG1' width='8')
    stimulus (scl=rwb regfiles=w)
sfr (key=RCREG1 addr=0xfae size=1 access='r r r r r r r r')
    reset (por='00000000' mclr='00000000')
    bit (names='RCREG1' width='8')
    stimulus (scl=rwb regfiles=rp)
sfr (key=SPBRG1 addr=0xfaf size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='SPBRG1' width='8')
    stimulus (scl=rwb regfiles=w)
sfr (key=PSPCON addr=0xfb0 size=1 access='rw rw rw rw u u u u')
    reset (por='0000----' mclr='0000----')
    bit (names='IBF OBF IBOV PSPMODE - - - -' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=T3CON addr=0xfb1 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='uuuuuuuu')
    bit (names='RD16 T3CCP2 T3CKPS T3CCP1 nT3SYNC TMR3CS TMR3ON' width='1 1 2 1 1 1 1')
    stimulus (scl=rwb regfiles=w)
sfr (key=TMR3 addr=0xfb2 size=2 flags=j)
    bit (names='TMR3' width='16')
sfr (key=TMR3L addr=0xfb2 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='TMR3L' width='8')
    stimulus (scl=rwb pcfiles=w regfiles=w type=int)
sfr (key=TMR3H addr=0xfb3 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='TMR3H' width='8')
    stimulus (scl=rwb pcfiles=w regfiles=w type=int)
sfr (key=CMCON addr=0xfb4 size=1 access='r r rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='C2OUT C1OUT C2INV C1INV CIS CM' width='1 1 1 1 1 3')
    stimulus (scl=rwb regfiles=w)
sfr (key=CVRCON addr=0xfb5 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='CVREN CVROE CVRR CVRSS CVR' width='1 1 1 1 4')
    stimulus (scl=rwb regfiles=w)
UnusedRegs (0xfb6-0xfb6)
sfr (key=CCP3CON addr=0xfb7 size=1 access='u u rw rw rw rw rw rw')
    reset (por='--000000' mclr='--000000')
    bit (names='- - DC3B CCP3M' width='1 1 2 4')
    stimulus (scl=rwb regfiles=w)
sfr (key=CCPR3 addr=0xfb8 size=2 flags=j)
    bit (names='CCPR3' width='16')
sfr (key=CCPR3L addr=0xfb8 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='CCPR3L' width='8')
    stimulus (scl=rwb regfiles=w type=int)
sfr (key=CCPR3H addr=0xfb9 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='CCPR3H' width='8')
    stimulus (scl=rwb regfiles=w type=int)
sfr (key=CCP2CON addr=0xfba size=1 access='u u rw rw rw rw rw rw')
    reset (por='--000000' mclr='--000000')
    bit (names='- - DC2B CCP2M' width='1 1 2 4')
    stimulus (scl=rwb regfiles=w)
sfr (key=CCPR2 addr=0xfbb size=2 flags=j)
    bit (names='CCPR2' width='16')
sfr (key=CCPR2L addr=0xfbb size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='CCPR2L' width='8')
    stimulus (scl=rwb regfiles=w type=int)
sfr (key=CCPR2H addr=0xfbc size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='CCPR2H' width='8')
    stimulus (scl=rwb regfiles=w type=int)
sfr (key=CCP1CON addr=0xfbd size=1 access='u u rw rw rw rw rw rw')
    reset (por='--000000' mclr='--000000')
    bit (names='- - DC1B CCP1M' width='1 1 2 4')
    stimulus (scl=rwb regfiles=w)
sfr (key=CCPR1 addr=0xfbe size=2 flags=j)
    bit (names='CCPR1' width='16')
sfr (key=CCPR1L addr=0xfbe size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='CCPR1L' width='8')
    stimulus (scl=rwb regfiles=w type=int)
sfr (key=CCPR1H addr=0xfbf size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='CCPR1H' width='8')
    stimulus (scl=rwb regfiles=w type=int)
sfr (key=ADCON2 addr=0xfc0 size=1 access='rw u u u u rw rw rw')
    reset (por='0----000' mclr='0----000')
    bit (names='ADFM - - - - ADCS' width='1 1 1 1 1 3')
    stimulus (scl=rwb regfiles=w)
sfr (key=ADCON1 addr=0xfc1 size=1 access='u u rw rw rw rw rw rw')
    reset (por='--00qqqq' mclr='--000000')
    bit (names='- - VCFG PCFG' width='1 1 2 4')
    stimulus (scl=rwb regfiles=w)
sfr (key=ADCON0 addr=0xfc2 size=1 access='u u rw rw rw rw rw rw')
    reset (por='--000000' mclr='--000000')
    bit (names='- - CHS GO/nDONE ADON' width='1 1 4 1 1')
    bit (tag=scl names='- - CHS GO_nDONE ADON' width='1 1 4 1 1')
    stimulus (scl=rwb regfiles=w)
sfr (key=ADRES addr=0xfc3 size=2 flags=j)
    bit (names='ADRES' width='16')
sfr (key=ADRESL addr=0xfc3 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='ADRESL' width='8')
    stimulus (scl=rwb regfiles=r type=int)
sfr (key=ADRESH addr=0xfc4 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='ADRESH' width='8')
    stimulus (scl=rwb regfiles=w type=int)
sfr (key=SSPCON2 addr=0xfc5 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='GCEN ACKSTAT ACKDT ACKEN RCEN PEN RSEN SEN' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=SSPCON1 addr=0xfc6 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='WCOL SSPOV SSPEN CKP SSPM' width='1 1 1 1 4')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=SSPSTAT addr=0xfc7 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='SMP CKE D/nA P S R/nW UA BF' width='1 1 1 1 1 1 1 1')
    bit (tag=scl names='SMP CKE D_nA P S R_nW UA BF' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=rw)
sfr (key=SSPADD addr=0xfc8 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='SSPADD' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=SSPBUF addr=0xfc9 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='SSPBUF' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=rw)
sfr (key=T2CON addr=0xfca size=1 access='u rw rw rw rw rw rw rw')
    reset (por='-0000000' mclr='-0000000')
    bit (names='- T2OUTPS TMR2ON T2CKPS' width='1 4 1 2')
    stimulus (scl=rwb regfiles=w)
sfr (key=PR2 addr=0xfcb size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='11111111' mclr='11111111')
    bit (names='PR2' width='8')
    stimulus (scl=rwb regfiles=w type=int)
sfr (key=TMR2 addr=0xfcc size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='TMR2' width='8')
    stimulus (scl=rwb pcfiles=w regfiles=w type=int)
sfr (key=T1CON addr=0xfcd size=1 access='rw u rw rw rw rw rw rw')
    reset (por='0-000000' mclr='u-uuuuuu')
    bit (names='RD16 - T1CKPS T1OSCEN nT1SYNC TMR1CS TMR1ON' width='1 1 2 1 1 1 1')
    stimulus (scl=rwb regfiles=w)
sfr (key=TMR1 addr=0xfce size=2 flags=j)
    bit (names='TMR1' width='16')
sfr (key=TMR1L addr=0xfce size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='TMR1L' width='8')
    stimulus (scl=rwb pcfiles=w regfiles=w type=int)
sfr (key=TMR1H addr=0xfcf size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='TMR1H' width='8')
    stimulus (scl=rwb pcfiles=w regfiles=w type=int)
sfr (key=RCON addr=0xfd0 size=1 access='rw u u rw rw rw rw rw')
    reset (por='0--11100' mclr='0--uqquu')
    bit (names='IPEN - - nRI nTO nPD nPOR nBOR' width='1 1 1 1 1 1 1 1')
    stimulus (scl=r pcfiles=rw regfiles=w)
sfr (key=WDTCON addr=0xfd1 size=1 access='u u u u u u u rw')
    reset (por='-------0' mclr='-------0')
    bit (names='- - - - - - - SWDTEN' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=LVDCON addr=0xfd2 size=1 access='u u rw rw rw rw rw rw')
    reset (por='--000101' mclr='--000101')
    bit (names='- - IRVST LVDEN LVDL' width='1 1 1 1 4')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=OSCCON addr=0xfd3 size=1 access='u u u u u u u rw')
    reset (por='-------0' mclr='-------0')
    bit (names='- - - - - - - SCS' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
UnusedRegs (0xfd4-0xfd4)
sfr (key=T0CON addr=0xfd5 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='11111111' mclr='11111111')
    bit (names='TMR0ON T08BIT T0CS T0SE PSA T0PS' width='1 1 1 1 1 3')
    stimulus (scl=rwb regfiles=w)
sfr (key=TMR0 addr=0xfd6 size=2 flags=j)
    bit (names='TMR0' width='16')
sfr (key=TMR0L addr=0xfd6 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='TMR0L' width='8')
    stimulus (scl=rwb pcfiles=w regfiles=w type=int)
sfr (key=TMR0H addr=0xfd7 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='TMR0H' width='8')
    stimulus (scl=rwb pcfiles=w regfiles=w type=int)
sfr (key=STATUS addr=0xfd8 size=1 access='u u u rw rw rw rw rw')
    reset (por='---xxxxx' mclr='---uuuuu')
    bit (names='- - - N OV Z DC C' width='1 1 1 1 1 1 1 1')
sfr (key=FSR2 addr=0xfd9 size=2 flags=j)
    bit (names='- - - - FSR2' width='1 1 1 1 12')
sfr (key=FSR2L addr=0xfd9 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='FSR2L' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=FSR2H addr=0xfda size=1 access='u u u u rw rw rw rw')
    reset (por='----0000' mclr='----0000')
    bit (names='- - - - FSR2H' width='1 1 1 1 4')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=PLUSW2 addr=0xfdb size=1 flags=i access='u u u u u u u u')
    reset (por='--------' mclr='--------')
    bit (names='PLUSW2' width='8')
sfr (key=PREINC2 addr=0xfdc size=1 flags=i access='u u u u u u u u')
    reset (por='--------' mclr='--------')
    bit (names='PREINC2' width='8')
sfr (key=POSTDEC2 addr=0xfdd size=1 flags=i access='u u u u u u u u')
    reset (por='--------' mclr='--------')
    bit (names='POSTDEC2' width='8')
sfr (key=POSTINC2 addr=0xfde size=1 flags=i access='u u u u u u u u')
    reset (por='--------' mclr='--------')
    bit (names='POSTINC2' width='8')
sfr (key=INDF2 addr=0xfdf size=1 flags=i access='u u u u u u u u')
    reset (por='--------' mclr='--------')
    bit (names='INDF2' width='8')
sfr (key=BSR addr=0xfe0 size=1 access='u u u u rw rw rw rw')
    reset (por='----0000' mclr='----0000')
    bit (names='- - - - BSR' width='1 1 1 1 4')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=FSR1 addr=0xfe1 size=2 flags=j)
    bit (names='- - - - FSR1' width='1 1 1 1 12')
sfr (key=FSR1L addr=0xfe1 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='FSR1L' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=FSR1H addr=0xfe2 size=1 access='u u u u rw rw rw rw')
    reset (por='----0000' mclr='----uuuu')
    bit (names='- - - - FSR1H' width='1 1 1 1 4')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=PLUSW1 addr=0xfe3 size=1 flags=i access='u u u u u u u u')
    reset (por='--------' mclr='--------')
    bit (names='PLUSW1' width='8')
sfr (key=PREINC1 addr=0xfe4 size=1 flags=i access='u u u u u u u u')
    reset (por='--------' mclr='--------')
    bit (names='PREINC1' width='8')
sfr (key=POSTDEC1 addr=0xfe5 size=1 flags=i access='u u u u u u u u')
    reset (por='--------' mclr='--------')
    bit (names='POSTDEC1' width='8')
sfr (key=POSTINC1 addr=0xfe6 size=1 flags=i access='u u u u u u u u')
    reset (por='--------' mclr='--------')
    bit (names='POSTINC1' width='8')
sfr (key=INDF1 addr=0xfe7 size=1 flags=i access='u u u u u u u u')
    reset (por='--------' mclr='--------')
    bit (names='INDF1' width='8')
sfr (key=WREG addr=0xfe8 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='WREG' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=w type=int)
sfr (key=FSR0 addr=0xfe9 size=2 flags=j)
    bit (names='- - - - FSR0' width='1 1 1 1 12')
sfr (key=FSR0L addr=0xfe9 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='FSR0L' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=FSR0H addr=0xfea size=1 access='u u u u rw rw rw rw')
    reset (por='----0000' mclr='----uuuu')
    bit (names='- - - - FSR0H' width='1 1 1 1 4')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=PLUSW0 addr=0xfeb size=1 flags=i access='u u u u u u u u')
    reset (por='--------' mclr='--------')
    bit (names='PLUSW0' width='8')
sfr (key=PREINC0 addr=0xfec size=1 flags=i access='u u u u u u u u')
    reset (por='--------' mclr='--------')
    bit (names='PREINC0' width='8')
sfr (key=POSTDEC0 addr=0xfed size=1 flags=i access='u u u u u u u u')
    reset (por='--------' mclr='--------')
    bit (names='POSTDEC0' width='8')
sfr (key=POSTINC0 addr=0xfee size=1 flags=i access='u u u u u u u u')
    reset (por='--------' mclr='--------')
    bit (names='POSTINC0' width='8')
sfr (key=INDF0 addr=0xfef size=1 flags=i access='u u u u u u u u')
    reset (por='--------' mclr='--------')
    bit (names='INDF0' width='8')
sfr (key=INTCON3 addr=0xff0 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='11000000' mclr='11000000')
    bit (names='INT2IP INT1IP INT3IE INT2IE INT1IE INT3IF INT2IF INT1IF' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=INTCON2 addr=0xff1 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='11111111' mclr='11111111')
    bit (names='nRBPU INTEDG0 INTEDG1 INTEDG2 INTEDG3 TMR0IP INT3IP RBIP' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=INTCON addr=0xff2 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='0000000x' mclr='0000000u')
    bit (names='GIE/GIEH PEIE/GIEL TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF' width='1 1 1 1 1 1 1 1')
    # NOTE: When IPEN (bit 7) in the RCON register is 0 use the following bit names
    qbit (names='GIE PEIE TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF' width='1 1 1 1 1 1 1 1')
    # NOTE: When IPEN (bit 7) in the RCON register is 1 use the following bit names
    qbit (names='GIEH GIEL TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF' width='1 1 1 1 1 1 1 1')
    bit (tag=scl names='GIE_GIEH PEIE_GIEL TMR0IE INT0IE RBIE TMR0IF INT0IF RBIF' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=PROD addr=0xff3 size=2 flags=j)
    bit (names='PROD' width='16')
sfr (key=PRODL addr=0xff3 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='PRODL' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=PRODH addr=0xff4 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='PRODH' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=TABLAT addr=0xff5 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='TABLAT' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=TBLPTR addr=0xff6 size=3 flags=j)
    bit (names='- - ACSS TBLPTR' width='1 1 1 21')
sfr (key=TBLPTRL addr=0xff6 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='TBLPTRL' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=TBLPTRH addr=0xff7 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='TBLPTRH' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=TBLPTRU addr=0xff8 size=1 access='u u rw rw rw rw rw rw')
    reset (por='--000000' mclr='--000000')
    bit (names='- - ACSS TBLPTRU' width='1 1 1 5')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=PCLAT addr=0xff9 size=3 flags=j)
    bit (names='- - - PCLAT' width='1 1 1 21')
sfr (key=PCL addr=0xff9 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='PCL' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=PCLATH addr=0xffa size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='PCH' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=PCLATU addr=0xffb size=1 access='u u u rw rw rw rw rw')
    reset (por='---00000' mclr='---00000')
    bit (names='- - - PCU' width='1 1 1 5')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=STKPTR addr=0xffc size=1 access='rc rc u rw rw rw rw rw')
    reset (por='00-00000' mclr='00-00000')
    bit (names='STKFUL STKUNF - STKPTR' width='1 1 1 5')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=TOS addr=0xffd size=3 flags=j)
    bit (names='- - - TOS' width='1 1 1 21')
sfr (key=TOSL addr=0xffd size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='TOSL' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=TOSH addr=0xffe size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='TOSH' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=TOSU addr=0xfff size=1 access='u u u rw rw rw rw rw')
    reset (por='---00000' mclr='---00000')
    bit (names='- - - TOSU' width='1 1 1 5')
    stimulus (scl=rwb pcfiles=rw regfiles=w)

######################################################################
#
# Non Memory-Mapped Registers
#
# (Conditionally visible SFRs appear as NMMRs in the "Special Function
# Registers" section.)
#
######################################################################

HasNMMR=1
nmmr (key=TMR0_Internal addr=0xa size=2 access='r r r r r r r r r r r r r r r r')
    reset (por='xxxxxxxxxxxxxxxx' mclr='uuuuuuuuuuuuuuuu')
    bit (names='InternalTMR' width='16')
nmmr (key=TMR0_Prescale addr=0x12 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='InternalPS' width='8')
nmmr (key=TMR1_Internal addr=0xc size=2 access='r r r r r r r r r r r r r r r r')
    reset (por='xxxxxxxxxxxxxxxx' mclr='uuuuuuuuuuuuuuuu')
    bit (names='InternalTMR' width='16')
nmmr (key=TMR1_Prescale addr=0x13 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='InternalPS' width='8')
nmmr (key=TMR2_Prescale addr=0x14 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='InternalPS' width='8')
nmmr (key=TMR3_Internal addr=0xe size=2 access='r r r r r r r r r r r r r r r r')
    reset (por='xxxxxxxxxxxxxxxx' mclr='uuuuuuuuuuuuuuuu')
    bit (names='InternalTMR' width='16')
nmmr (key=TMR3_Prescale addr=0x15 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='InternalPS' width='8')
nmmr (key=TMR4_Prescale addr=0x16 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='InternalPS' width='8')
NMMRObjSize=8

######################################################################
#
# Configuration Registers
#
######################################################################

cfgbits (key=CONFIG1H addr=0x300001 unused=0x0)
    field (key=OSC mask=0x7 desc="Oscillator Selection bits")
        setting (req=0x7 value=0x7 desc="RC oscillator w/ OSC2 configured as RA6" freqmin=32000 freqmax=4000000)
        setting (req=0x7 value=0x6 desc="HS oscillator with PLL enabled; clock frequency = (4 x FOSC)" freqmin=16000000 freqmax=40000000)
        setting (req=0x7 value=0x5 desc="EC oscillator w/ OSC2 configured as RA6" freqmin=32000 freqmax=40000000)
        setting (req=0x7 value=0x4 desc="EC oscillator w/ OSC2 configured as divide-by-4 clock output" freqmin=32000 freqmax=40000000)
        setting (req=0x7 value=0x3 desc="RC oscillator w/ OSC2 configured as divide-by-4 clock output" freqmin=32000 freqmax=4000000)
        setting (req=0x7 value=0x2 desc="HS oscillator" freqmin=4000000 freqmax=25000000)
        setting (req=0x7 value=0x1 desc="XT oscillator" freqmin=200000 freqmax=4000000)
        setting (req=0x7 value=0x0 desc="LP oscillator" freqmin=32000 freqmax=200000)
    field (key=OSCS mask=0x20 desc="Oscillator System Clock Switch Enable bit")
        setting (req=0x20 value=0x20 desc="Disabled")
        setting (req=0x20 value=0x0 desc="Enabled")
cfgbits (key=CONFIG2L addr=0x300002 unused=0x0)
    field (key=PWRT mask=0x1 desc="Power-up Timer Enable bit")
        setting (req=0x1 value=0x1 desc="Disabled")
        setting (req=0x1 value=0x0 desc="Enabled")
    field (key=BOR mask=0x2 desc="Brown-out Reset Enable bit")
        setting (req=0x2 value=0x2 desc="Enabled")
        setting (req=0x2 value=0x0 desc="Disabled")
    field (key=BORV mask=0xc desc="Brown-out Reset Voltage bits")
        setting (req=0xc value=0xc desc="VBOR set to 2.5V")
        setting (req=0xc value=0x8 desc="VBOR set to 2.7V")
        setting (req=0xc value=0x4 desc="VBOR set to 4.2V")
        setting (req=0xc value=0x0 desc="VBOR set to 4.5V")
cfgbits (key=CONFIG2H addr=0x300003 unused=0x0)
    field (key=WDT mask=0x1 desc="Watchdog Timer Enable bit")
        setting (req=0x1 value=0x1 desc="Enabled")
        setting (req=0x1 value=0x0 desc="Disabled")
    field (key=WDTPS mask=0xe desc="Watchdog Timer Postscale Select bits")
        setting (req=0xe value=0xe desc="1:128")
        setting (req=0xe value=0xc desc="1:64")
        setting (req=0xe value=0xa desc="1:32")
        setting (req=0xe value=0x8 desc="1:16")
        setting (req=0xe value=0x6 desc="1:8")
        setting (req=0xe value=0x4 desc="1:4")
        setting (req=0xe value=0x2 desc="1:2")
        setting (req=0xe value=0x0 desc="1:1")
cfgbits (key=CONFIG3L addr=0x300004 unused=0x0)
    field (key=RESERVED mask=0x3 desc="RESERVED" flags=xh)
        setting (req=0x3 value=0x3 desc="Maintain bits as 1s" mode=microctrl)
    field (key=RES mask=0x80 desc="RESERVED" flags=xh)
        setting (req=0x80 value=0x80 desc="Maintain bit as 1")
cfgbits (key=CONFIG3H addr=0x300005 unused=0x0)
    field (key=CCP2MUX mask=0x1 desc="CCP2 Mux bit")
        setting (req=0x1 value=0x1 desc="Enabled")
        setting (req=0x1 value=0x0 desc="Disabled")
cfgbits (key=CONFIG4L addr=0x300006 unused=0x0)
    field (key=STVR mask=0x1 desc="Stack Full/Underflow Reset Enable bit")
        setting (req=0x1 value=0x1 desc="Enabled")
        setting (req=0x1 value=0x0 desc="Disabled")
    field (key=LVP mask=0x4 desc="Low-Voltage ICSP Enable bit")
        setting (req=0x4 value=0x4 desc="Enabled")
        setting (req=0x4 value=0x0 desc="Disabled")
    field (key=DEBUG mask=0x80 desc="Background Debugger Enable bit" flags=h)
        setting (req=0x80 value=0x80 desc="Disabled")
        setting (req=0x80 value=0x0 desc="Enabled")
cfgbits (key=CONFIG5L addr=0x300008 unused=0x0)
    field (key=CP0 mask=0x1 desc="Code Protection bit")
        setting (req=0x1 value=0x1 desc="Disabled")
            checksum (type=0x0 protregion=0x0-0x0)
        setting (req=0x1 value=0x0 desc="Enabled")
            checksum (type=0x27 protregion=0x200-0x3fff)
    field (key=CP1 mask=0x2 desc="Code Protection bit")
        setting (req=0x2 value=0x2 desc="Disabled")
            checksum (type=0x0 protregion=0x0-0x0)
        setting (req=0x2 value=0x0 desc="Enabled")
            checksum (type=0x27 protregion=0x4000-0x7fff)
    field (key=CP2 mask=0x4 desc="Code Protection bit")
        setting (req=0x4 value=0x4 desc="Disabled")
            checksum (type=0x0 protregion=0x0-0x0)
        setting (req=0x4 value=0x0 desc="Enabled")
            checksum (type=0x27 protregion=0x8000-0xbfff)
    field (key=CP3 mask=0x8 desc="Code Protection bit")
        setting (req=0x8 value=0x8 desc="Disabled")
            checksum (type=0x0 protregion=0x0-0x0)
        setting (req=0x8 value=0x0 desc="Enabled")
            checksum (type=0x27 protregion=0xc000-0xffff)
    field (key=CP4 mask=0x10 desc="Code Protection bit")
        setting (req=0x10 value=0x10 desc="Disabled")
            checksum (type=0x0 protregion=0x0-0x0)
        setting (req=0x10 value=0x0 desc="Enabled")
            checksum (type=0x27 protregion=0x10000-0x13fff)
    field (key=CP5 mask=0x20 desc="Code Protection bit")
        setting (req=0x20 value=0x20 desc="Disabled")
            checksum (type=0x0 protregion=0x0-0x0)
        setting (req=0x20 value=0x0 desc="Enabled")
            checksum (type=0x27 protregion=0x14000-0x17fff)
    field (key=CP6 mask=0x40 desc="Code Protection bit")
        setting (req=0x40 value=0x40 desc="Disabled")
            checksum (type=0x0 protregion=0x0-0x0)
        setting (req=0x40 value=0x0 desc="Enabled")
            checksum (type=0x27 protregion=0x18000-0x1bfff)
    field (key=CP7 mask=0x80 desc="Code Protection bit")
        setting (req=0x80 value=0x80 desc="Disabled")
            checksum (type=0x0 protregion=0x0-0x0)
        setting (req=0x80 value=0x0 desc="Enabled")
            checksum (type=0x27 protregion=0x1c000-0x1ffff)
cfgbits (key=CONFIG5H addr=0x300009 unused=0x0)
    field (key=CPB mask=0x40 desc="Boot Block Code Protection bit")
        setting (req=0x40 value=0x40 desc="Disabled")
            checksum (type=0x0 protregion=0x0-0x0)
        setting (req=0x40 value=0x0 desc="Enabled")
            checksum (type=0x27 protregion=0x0-0x1ff)
    field (key=CPD mask=0x80 desc="Data EEPROM Code Protection bit")
        setting (req=0x80 value=0x80 desc="Disabled")
        setting (req=0x80 value=0x0 desc="Enabled")
cfgbits (key=CONFIG6L addr=0x30000a unused=0x0)
    field (key=WRT0 mask=0x1 desc="Write Protection bit")
        setting (req=0x1 value=0x1 desc="Disabled")
        setting (req=0x1 value=0x0 desc="Enabled")
    field (key=WRT1 mask=0x2 desc="Write Protection bit")
        setting (req=0x2 value=0x2 desc="Disabled")
        setting (req=0x2 value=0x0 desc="Enabled")
    field (key=WRT2 mask=0x4 desc="Write Protection bit")
        setting (req=0x4 value=0x4 desc="Disabled")
        setting (req=0x4 value=0x0 desc="Enabled")
    field (key=WRT3 mask=0x8 desc="Write Protection bit")
        setting (req=0x8 value=0x8 desc="Disabled")
        setting (req=0x8 value=0x0 desc="Enabled")
    field (key=WRT4 mask=0x10 desc="Write Protection bit")
        setting (req=0x10 value=0x10 desc="Disabled")
        setting (req=0x10 value=0x0 desc="Enabled")
    field (key=WRT5 mask=0x20 desc="Write Protection bit")
        setting (req=0x20 value=0x20 desc="Disabled")
        setting (req=0x20 value=0x0 desc="Enabled")
    field (key=WRT6 mask=0x40 desc="Write Protection bit")
        setting (req=0x40 value=0x40 desc="Disabled")
        setting (req=0x40 value=0x0 desc="Enabled")
    field (key=WRT7 mask=0x80 desc="Write Protection bit")
        setting (req=0x80 value=0x80 desc="Disabled")
        setting (req=0x80 value=0x0 desc="Enabled")
cfgbits (key=CONFIG6H addr=0x30000b unused=0x0)
    field (key=WRTC mask=0x20 desc="Configuration Register Write Protection bit")
        setting (req=0x20 value=0x20 desc="Disabled")
        setting (req=0x20 value=0x0 desc="Enabled")
    field (key=WRTB mask=0x40 desc="Boot Block Write Protection bit")
        setting (req=0x40 value=0x40 desc="Disabled")
        setting (req=0x40 value=0x0 desc="Enabled")
    field (key=WRTD mask=0x80 desc="Data EEPROM Write Protection bit")
        setting (req=0x80 value=0x80 desc="Disabled")
        setting (req=0x80 value=0x0 desc="Enabled")
cfgbits (key=CONFIG7L addr=0x30000c unused=0x0)
    field (key=EBTR0 mask=0x1 desc="Table Read Protection bit")
        setting (req=0x1 value=0x1 desc="Disabled")
        setting (req=0x1 value=0x0 desc="Enabled")
    field (key=EBTR1 mask=0x2 desc="Table Read Protection bit")
        setting (req=0x2 value=0x2 desc="Disabled")
        setting (req=0x2 value=0x0 desc="Enabled")
    field (key=EBTR2 mask=0x4 desc="Table Read Protection bit")
        setting (req=0x4 value=0x4 desc="Disabled")
        setting (req=0x4 value=0x0 desc="Enabled")
    field (key=EBTR3 mask=0x8 desc="Table Read Protection bit")
        setting (req=0x8 value=0x8 desc="Disabled")
        setting (req=0x8 value=0x0 desc="Enabled")
    field (key=EBTR4 mask=0x10 desc="Table Read Protection bit")
        setting (req=0x10 value=0x10 desc="Disabled")
        setting (req=0x10 value=0x0 desc="Enabled")
    field (key=EBTR5 mask=0x20 desc="Table Read Protection bit")
        setting (req=0x20 value=0x20 desc="Disabled")
        setting (req=0x20 value=0x0 desc="Enabled")
    field (key=EBTR6 mask=0x40 desc="Table Read Protection bit")
        setting (req=0x40 value=0x40 desc="Disabled")
        setting (req=0x40 value=0x0 desc="Enabled")
    field (key=EBTR7 mask=0x80 desc="Table Read Protection bit")
        setting (req=0x80 value=0x80 desc="Disabled")
        setting (req=0x80 value=0x0 desc="Enabled")
cfgbits (key=CONFIG7H addr=0x30000d unused=0x0)
    field (key=EBTRB mask=0x40 desc="Boot Block Table Read Protection bit")
        setting (req=0x40 value=0x40 desc="Disabled")
        setting (req=0x40 value=0x0 desc="Enabled")
