######################################################################
#
# MPLAB IDE .dev File Generated by `pic2dev.py'
#
# Device: PIC16C782
# Family: 16xxxx
# Datasheet: 41171
# Programming Spec: 30298
# Date: Tue Apr 30 09:40:29 2013
#
######################################################################


######################################################################
#
# Memory Regions & Other General Device Information
#
######################################################################

vpp (range=12.750-13.250 dflt=13.000)
vdd (range=2.500-5.500 dfltrange=4.000-5.500 nominal=5.000)
pgming (memtech=eprom ovrpgm=3 tries=25)
    wait (pgm=100 cfg=100 userid=100)
HWStackDepth=8
testmem (region=0x2000-0x21ff)
userid (region=0x2000-0x2003)
cfgmem (region=0x2007-0x2007)
pgmmem (region=0x0-0x7ff)
NumBanks=4
MirrorRegs (0x1-0x1 0x101-0x101)
MirrorRegs (0x6-0x6 0x106-0x106)
MirrorRegs (0xa-0xb 0x8a-0x8b 0x10a-0x10b 0x18a-0x18b)
MirrorRegs (0x81-0x81 0x181-0x181)
MirrorRegs (0x0-0x0 0x80-0x80 0x100-0x100 0x180-0x180)
MirrorRegs (0x2-0x4 0x82-0x84 0x102-0x104 0x182-0x184)
MirrorRegs (0x86-0x86 0x186-0x186)
MirrorRegs (0x70-0x7f 0xf0-0xff 0x170-0x17f 0x1f0-0x1ff)
UnusedRegs (0xc0-0xef)
UnusedRegs (0x120-0x16f)
UnusedRegs (0x18d-0x1ef)

######################################################################
#
# Special Function Registers
#
######################################################################

sfr (key=INDF addr=0x0 size=1 flags=i access='u u u u u u u u')
    reset (por='--------' mclr='--------')
    bit (names='INDF' width='8')
sfr (key=TMR0 addr=0x1 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='TMR0' width='8')
    stimulus (scl=rwb pcfiles=w regfiles=w type=int)
sfr (key=PCL addr=0x2 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='PCL' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=STATUS addr=0x3 size=1 access='rw rw rw r r rw rw rw')
    reset (por='00011xxx' mclr='000qquuu')
    bit (names='IRP RP nTO nPD Z DC C' width='1 2 1 1 1 1 1')
sfr (key=FSR addr=0x4 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='FSR' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=w type=int)
sfr (key=PORTA addr=0x5 size=1 access='rw rw r rw rw rw r r')
    reset (por='xxxx0000' mclr='uuuu0000')
    bit (names='RA7 RA6 RA5 RA4 RA3 RA2 RA1 RA0' width='1 1 1 1 1 1 1 1')
    bit (tag=scl names='RA' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=rw)
sfr (key=PORTB addr=0x6 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxx0000' mclr='uuuu0000')
    bit (names='RB7 RB6 RB5 RB4 RB3 RB2 RB1 RB0' width='1 1 1 1 1 1 1 1')
    bit (tag=scl names='RB' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=rw)
UnusedRegs (0x7-0x9)
sfr (key=PCLATH addr=0xa size=1 access='u u u rw rw rw rw rw')
    reset (por='---00000' mclr='---00000')
    bit (names='- - - PCLATH' width='1 1 1 5')
    stimulus (scl=rwb pcfiles=rw regfiles=w type=int)
sfr (key=INTCON addr=0xb size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='0000000x' mclr='0000000u')
    bit (names='GIE PEIE T0IE INTE RBIE T0IF INTF RBIF' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=PIR1 addr=0xc size=1 access='rw rw rw rw u u u rw')
    reset (por='0000---0' mclr='0000---0')
    bit (names='LVDIF ADIF C2IF C1IF - - - TMR1IF' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
UnusedRegs (0xd-0xd)
sfr (key=TMR1 addr=0xe size=2 flags=j)
    bit (names='TMR1' width='16')
    stimulus (scl=rwb regfiles=w type=int)
sfr (key=TMR1L addr=0xe size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='TMR1L' width='8')
    stimulus (scl=rwb pcfiles=w regfiles=w type=int)
sfr (key=TMR1H addr=0xf size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='TMR1H' width='8')
    stimulus (scl=rwb pcfiles=w regfiles=w type=int)
sfr (key=T1CON addr=0x10 size=1 access='u rw rw rw rw rw rw rw')
    reset (por='-0000000' mclr='-uuuuuuu')
    bit (names='- TMR1GE T1CKPS T1OSCEN nT1SYNC TMR1CS TMR1ON' width='1 1 2 1 1 1 1')
    stimulus (scl=rwb regfiles=w)
UnusedRegs (0x11-0x1d)
sfr (key=ADRES addr=0x1e size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='ADRES' width='8')
    stimulus (scl=rwb regfiles=r type=int)
sfr (key=ADCON0 addr=0x1f size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='ADCS CHS GO/nDONE CHS3 ADON' width='2 3 1 1 1')
    bit (tag=scl names='ADCS CHS GO_nDONE CHS3 ADON' width='2 3 1 1 1')
    stimulus (scl=rwb regfiles=w)
sfr (key=OPTION_REG addr=0x81 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='11111111' mclr='11111111')
    bit (names='nRBPU INTEDG T0CS T0SE PSA PS' width='1 1 1 1 1 3')
    stimulus (scl=rwb regfiles=w)
sfr (key=TRISA addr=0x85 size=1 access='rw rw r rw rw rw r r')
    reset (por='11111111' mclr='11111111')
    bit (names='TRISA7 TRISA6 TRISA5 TRISA4 TRISA3 TRISA2 TRISA1 TRISA0' width='1 1 1 1 1 1 1 1')
    bit (tag=scl names='TRISA' width='8')
    stimulus (scl=rwb regfiles=w)
sfr (key=TRISB addr=0x86 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='11111111' mclr='11111111')
    bit (names='TRISB7 TRISB6 TRISB5 TRISB4 TRISB3 TRISB2 TRISB1 TRISB0' width='1 1 1 1 1 1 1 1')
    bit (tag=scl names='TRISB' width='8')
    stimulus (scl=rwb regfiles=w)
UnusedRegs (0x87-0x89)
sfr (key=PIE1 addr=0x8c size=1 access='rw rw rw rw u u u rw')
    reset (por='0000---0' mclr='0000---0')
    bit (names='LVDIE ADIE C2IE C1IE - - - TMR1IE' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
UnusedRegs (0x8d-0x8d)
sfr (key=PCON addr=0x8e size=1 access='u u u rw rw u rw rw')
    reset (por='---01-qq' mclr='---01-uu')
    bit (names='- - - WDTON OSCF - nPOR nBOR' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb regfiles=w)
UnusedRegs (0x8f-0x94)
sfr (key=WPUB addr=0x95 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='11111111' mclr='11111111')
    bit (names='WPUB7 WPUB6 WPUB5 WPUB4 WPUB3 WPUB2 WPUB1 WPUB0' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb regfiles=w)
sfr (key=IOCB addr=0x96 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='11110000' mclr='11110000')
    bit (names='IOCB7 IOCB6 IOCB5 IOCB4 IOCB3 IOCB2 IOCB1 IOCB0' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb regfiles=w)
UnusedRegs (0x97-0x9a)
sfr (key=REFCON addr=0x9b size=1 access='u u u u rw rw u u')
    reset (por='----00--' mclr='----00--')
    bit (names='- - - - VREN VROE - -' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb regfiles=w)
sfr (key=LVDCON addr=0x9c size=1 access='u u r rw rw rw rw rw')
    reset (por='--000101' mclr='--000101')
    bit (names='- - BGST LVDEN LV' width='1 1 1 1 4')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=ANSEL addr=0x9d size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='11111111' mclr='11111111')
    bit (names='ANS7 ANS6 ANS5 ANS4 ANS3 ANS2 ANS1 ANS0' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb regfiles=r)
UnusedRegs (0x9e-0x9e)
sfr (key=ADCON1 addr=0x9f size=1 access='u u rw rw u u u u')
    reset (por='--00----' mclr='--00----')
    bit (names='- - VCFG - - - -' width='1 1 2 1 1 1 1')
    stimulus (scl=rwb regfiles=w)
UnusedRegs (0x105-0x105)
UnusedRegs (0x107-0x109)
sfr (key=PMDATL addr=0x10c size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='PMDATL' width='8')
    stimulus (scl=rwb regfiles=w)
sfr (key=PMADRL addr=0x10d size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='PMADRL' width='8')
    stimulus (scl=rwb regfiles=w)
sfr (key=PMDATH addr=0x10e size=1 access='u u rw rw rw rw rw rw')
    reset (por='--000000' mclr='--000000')
    bit (names='- - PMDATH' width='1 1 6')
    stimulus (scl=rwb regfiles=w)
sfr (key=PMADRH addr=0x10f size=1 access='u u u rw rw rw rw rw')
    reset (por='-----xxx' mclr='-----uuu')
    bit (names='- - - - - PMADRH' width='1 1 1 1 1 3')
    stimulus (scl=rwb regfiles=w)
sfr (key=CALCON addr=0x110 size=1 access='rs r rw u u u u u')
    reset (por='000-----' mclr='000-----')
    bit (names='CAL CALERR CALREF - - - - -' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb regfiles=w)
sfr (key=PSMCCON0 addr=0x111 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='SMCCL MINDC MAXDC DC' width='2 2 2 2')
    stimulus (scl=rwb regfiles=w)
sfr (key=PSMCCON1 addr=0x112 size=1 access='rw rw rw u rw rw rw rw')
    reset (por='000-0000' mclr='000-0000')
    bit (names='SMCON S1APOL S1BPOL - SCEN SMCOM PWM/nPSM SMCCS' width='1 1 1 1 1 1 1 1')
    bit (tag=scl names='SMCON S1APOL S1BPOL - SCEN SMCOM PWM_nPSM SMCCS' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb regfiles=w)
UnusedRegs (0x113-0x118)
sfr (key=CM1CON0 addr=0x119 size=1 access='rw r rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='C1ON C1OUT C1OE C1POL C1SP C1R C1CH' width='1 1 1 1 1 1 2')
    stimulus (scl=rwb regfiles=w)
sfr (key=CM2CON0 addr=0x11a size=1 access='rw r rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='C2ON C2OUT C2OE C2POL C2SP C2R C2CH' width='1 1 1 1 1 1 2')
    stimulus (scl=rwb regfiles=w)
sfr (key=CM2CON1 addr=0x11b size=1 access='r r u u u u u rw')
    reset (por='00-----0' mclr='00-----0')
    bit (names='MC1OUT MC2OUT - - - - - C2SYNC' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb regfiles=w)
sfr (key=OPACON addr=0x11c size=1 access='rw rw u u u u u rw')
    reset (por='00-----0' mclr='00-----0')
    bit (names='OPAON CMPEN - - - - - GBWP' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb regfiles=w)
UnusedRegs (0x11d-0x11d)
sfr (key=DAC addr=0x11e size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='DA7 DA6 DA5 DA4 DA3 DA2 DA1 DA0' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb regfiles=w)
sfr (key=DACON0 addr=0x11f size=1 access='rw rw u u u u rw rw')
    reset (por='00----00' mclr='00----00')
    bit (names='DAON DAOE - - - - DARS' width='1 1 1 1 1 1 2')
    stimulus (scl=rwb regfiles=w)
UnusedRegs (0x185-0x185)
UnusedRegs (0x187-0x189)
sfr (key=PMCON1 addr=0x18c size=1 access='r u u u u u u rs')
    reset (por='1------0' mclr='1------0')
    bit (names='- - - - - - - RD' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb regfiles=w)

######################################################################
#
# Non Memory-Mapped Registers
#
# (Conditionally visible SFRs appear as NMMRs in the "Special Function
# Registers" section.)
#
######################################################################

HasNMMR=1
nmmr (key=WREG addr=0x0 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
nmmr (key=STKPTR addr=0x1 size=1 flags=h access='rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
NMMRObjSize=2

######################################################################
#
# Configuration Registers
#
######################################################################

cfgbits (key=CONFIG1 addr=0x2007 unused=0x80)
    field (key=FOSC mask=0x7 desc="Oscillator selection bits")
        setting (req=0x7 value=0x7 desc="RC CLKOUT")
        setting (req=0x7 value=0x6 desc="RC I/O")
        setting (req=0x7 value=0x5 desc="INTRC, clockout on OSC2")
        setting (req=0x7 value=0x4 desc="INTRC, OSC2 is I/O")
        setting (req=0x7 value=0x3 desc="EC I/O")
        setting (req=0x7 value=0x2 desc="HS oscillator")
        setting (req=0x7 value=0x1 desc="XT oscillator")
        setting (req=0x7 value=0x0 desc="LP oscillator")
    field (key=WDTE mask=0x8 desc="Watchdog Timer Enable bit")
        setting (req=0x8 value=0x8 desc="Enabled")
        setting (req=0x8 value=0x0 desc="Disabled")
    field (key=PWRTE mask=0x10 desc="Power-up Timer Enable bit")
        setting (req=0x10 value=0x10 desc="Disabled")
        setting (req=0x10 value=0x0 desc="Enabled")
    field (key=MCLRE mask=0x20 desc="Master Clear Enable")
        setting (req=0x20 value=0x20 desc="Enabled")
        setting (req=0x20 value=0x0 desc="Disabled")
    field (key=BOREN mask=0x40 desc="Brown-out Reset Enable bit")
        setting (req=0x40 value=0x40 desc="Enabled")
        setting (req=0x40 value=0x0 desc="Disabled")
    field (key=CP mask=0x3300 desc="Code Protecton bit")
        setting (req=0x3300 value=0x3300 desc="Disabled")
            checksum (type=0x0 protregion=0x0-0x0)
        setting (req=0x3300 value=0x0 desc="All memory is code protected")
            checksum (type=0x20 protregion=0x0-0x7ff)
    field (key=BODENV mask=0xc00 desc="Brown Out Voltage")
        setting (req=0xc00 value=0xc00 desc="VBOR set to 2.5V")
        setting (req=0xc00 value=0x800 desc="VBOR set to 2.7V")
        setting (req=0xc00 value=0x400 desc="VBOR set to 4.2V")
        setting (req=0xc00 value=0x0 desc="VBOR set to 4.5V")
