######################################################################
#
# MPLAB IDE .dev File Generated by `pic2dev.py'
#
# Device: PIC10F322
# Family: 16xxxx
# Datasheet: 41585
# Programming Spec: 41572
# Date: Tue Apr 30 09:40:14 2013
#
######################################################################


######################################################################
#
# Memory Regions & Other General Device Information
#
######################################################################

vpp (range=8.000-9.000 dflt=9.000)
vdd (range=1.800-5.500 dfltrange=1.800-5.500 nominal=5.000)
pgming (memtech=ee tries=1 boundary=4)
    wait (pgm=2500 eedata=8000 cfg=5000 userid=2500 erase=6000 lvpgm=2500)
    latches (pgm=16 eedata=1 cfg=1 userid=1 rowerase=16)
EraseAlg=1
HWStackDepth=8
breakpoints (numhwbp=3 datacapture=false idbyte=x)
cfgmem (region=0x2007-0x2007)
userid (region=0x2000-0x2003)
testmem (region=0x2000-0x20ff)
devid (region=0x2006-0x2006 idmask=0x3fe0 id=0x2980)
bkbgvectmem (region=0x2004-0x2004)
pgmmem (region=0x0-0x1ff)
NumBanks=1

######################################################################
#
# Special Function Registers
#
######################################################################

sfr (key=INDF addr=0x0 size=1 flags=i access='u u u u u u u u')
    reset (por='xxxxxxxx' mclr='xxxxxxxx')
    bit (names='INDF' width='8')
sfr (key=TMR0 addr=0x1 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='TMR0' width='8')
    stimulus (scl=rwb pcfiles=w regfiles=w type=int)
sfr (key=PCL addr=0x2 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='PCL' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=STATUS addr=0x3 size=1 access='rw rw rw r r rw rw rw')
    reset (por='00011xxx' mclr='000qquuu')
    bit (names='IRP RP1 RP0 nTO nPD Z DC C' width='1 1 1 1 1 1 1 1')
sfr (key=FSR addr=0x4 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='FSR' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=w type=int)
sfr (key=PORTA addr=0x5 size=1 access='u u u u r rw rw rw')
    reset (por='----xxxx' mclr='----uuuu')
    bit (names='- - - - RA3 RA2 RA1 RA0' width='1 1 1 1 1 1 1 1')
    bit (tag=scl names='RA' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=rw)
sfr (key=TRISA addr=0x6 size=1 access='u u u u r rw rw rw')
    reset (por='----1111' mclr='----1111')
    bit (names='- - - - - TRISA2 TRISA1 TRISA0' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w type=int)
sfr (key=LATA addr=0x7 size=1 access='u u u u u rw rw rw')
    reset (por='-----xxx' mclr='-----uuu')
    bit (names='- - - - - LATA2 LATA1 LATA0' width='1 1 1 1 1 1 1 1')
sfr (key=ANSELA addr=0x8 size=1 access='u u u u u rw rw rw')
    reset (por='-----111' mclr='-----111')
    bit (names='- - - - - ANSA2 ANSA1 ANSA0' width='1 1 1 1 1 1 1 1')
sfr (key=WPUA addr=0x9 size=1 access='u u u u rw rw rw rw')
    reset (por='----1111' mclr='----1111')
    bit (names='- - - - WPUA3 WPUA2 WPUA1 WPUA0' width='1 1 1 1 1 1 1 1')
sfr (key=PCLATH addr=0xa size=1 access='u u u u u u u rw')
    reset (por='-------0' mclr='-------0')
    bit (names='- - - - - - - PCLH0' width='1 1 1 1 1 1 1 1')
sfr (key=INTCON addr=0xb size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='GIE PEIE TMR0IE INTE IOCIE TMR0IF INTF IOCIF' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=PIR1 addr=0xc size=1 access='u rw u rw rw u rw u')
    reset (por='-0-00-0-' mclr='-0-0000-')
    bit (names='- ADIF - NCO1IF CLC1IF - TMR2IF -' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=PIE1 addr=0xd size=1 access='u rw u rw rw u rw u')
    reset (por='-0-00-0-' mclr='-0-0000-')
    bit (names='- ADIE - NCO1IE CLC1IE - TMR2IE -' width='1 1 1 1 1 1 1 1')
sfr (key=OPTION_REG addr=0xe size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='11111111' mclr='uuuuuuuu')
    bit (names='nWPUEN INTEDG T0CS T0SE PSA PS' width='1 1 1 1 1 3')
sfr (key=PCON addr=0xf size=1 access='u u u u u u rw rw')
    reset (por='------qq' mclr='------uu')
    bit (names='- - - - - - nPOR nBOR' width='1 1 1 1 1 1 1 1')
sfr (key=OSCCON addr=0x10 size=1 access='u rw rw rw rw u rw rw')
    reset (por='-1100-00' mclr='-1100-00')
    bit (names='- IRCF HFIOFR - LFIOFR HFIOFS' width='1 3 1 1 1 1')
sfr (key=TMR2 addr=0x11 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='TMR2' width='8')
    stimulus (scl=rwb pcfiles=w regfiles=w type=int)
sfr (key=PR2 addr=0x12 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='11111111' mclr='11111111')
    bit (names='PR2' width='8')
    stimulus (scl=rwb regfiles=w type=int)
sfr (key=T2CON addr=0x13 size=1 access='u rw rw rw rw rw rw rw')
    reset (por='-0000000' mclr='-0000000')
    bit (names='- TOUTPS TMR2ON T2CKPS' width='1 4 1 2')
    stimulus (scl=rwb regfiles=w)
sfr (key=PWM1DCL addr=0x14 size=1 access='rw rw u u u u u u')
    reset (por='xx------' mclr='uu------')
    bit (names='PWM1DCL - - - - - -' width='2 1 1 1 1 1 1')
sfr (key=PWM1DCH addr=0x15 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='PWM1DCH' width='8')
sfr (key=PWM1CON addr=0x16 size=1 access='rw rw rw rw u u u u')
    reset (por='00x0----' mclr='00x0----')
    bit (names='PWM1EN PWM1OE PWM1OUT PWM1POL - - - -' width='1 1 1 1 1 1 1 1')
sfr (key=PWM2DCL addr=0x17 size=1 access='rw rw u u u u u u')
    reset (por='xx------' mclr='uu------')
    bit (names='PWM2DCL - - - - - -' width='2 1 1 1 1 1 1')
sfr (key=PWM2DCH addr=0x18 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='PWM2DCH' width='8')
sfr (key=PWM2CON addr=0x19 size=1 access='rw rw rw rw u u u u')
    reset (por='00x0----' mclr='00x0----')
    bit (names='PWM2EN PWM2OE PWM2OUT PWM2POL - - - -' width='1 1 1 1 1 1 1 1')
sfr (key=IOCAP addr=0x1a size=1 access='u u u u rw rw rw rw')
    reset (por='----0000' mclr='----0000')
    bit (names='- - - - IOCAP3 IOCAP2 IOCAP1 IOCAP0' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb)
sfr (key=IOCAN addr=0x1b size=1 access='u u u u rw rw rw rw')
    reset (por='----0000' mclr='----0000')
    bit (names='- - - - IOCAN3 IOCAN2 IOCAN1 IOCAN0' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb regfiles=w)
sfr (key=IOCAF addr=0x1c size=1 access='u u u u rw rw rw rw')
    reset (por='----0000' mclr='----0000')
    bit (names='- - - - IOCAF3 IOCAF2 IOCAF1 IOCAF0' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb regfiles=w)
sfr (key=FVRCON addr=0x1d size=1 access='rw rw rw rw u u rw rw')
    reset (por='0x00--00' mclr='0x00--00')
    bit (names='FVREN FVRRDY TSEN TSRNG - - ADFVR1 ADFVR0' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb regfiles=w)
sfr (key=ADRES addr=0x1e size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='ADRES' width='8')
    stimulus (scl=rwb type=int)
sfr (key=ADCON addr=0x1f size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='ADCS CHS GO/nDONE ADON' width='3 3 1 1')
    stimulus (scl=rwb regfiles=w)
sfr (key=PMADR addr=0x20 size=2 flags=j)
sfr (key=PMADRL addr=0x20 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='PMADR' width='8')
sfr (key=PMADRH addr=0x21 size=1 access='u u u u u u u rw')
    reset (por='-------0' mclr='-------0')
    bit (names='- - - - - - - PMADR8' width='1 1 1 1 1 1 1 1')
sfr (key=PMDAT addr=0x22 size=2 flags=j)
sfr (key=PMDATL addr=0x22 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='PMDATL' width='8')
sfr (key=PMDATH addr=0x23 size=1 access='u u rw rw rw rw rw rw')
    reset (por='--xxxxxx' mclr='--uuuuuu')
    bit (names='- - PMDATH' width='1 1 6')
sfr (key=PMCON1 addr=0x24 size=1 access='u rw rw rw rw rw rw rw')
    reset (por='10000000' mclr='1000q000')
    bit (names='- CFGS LWLO FREE WRERR WREN WR RD' width='1 1 1 1 1 1 1 1')
sfr (key=PMCON2 addr=0x25 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='PMCON2' width='8')
sfr (key=CLKRCON addr=0x26 size=1 access='u rw u u u u u u')
    reset (por='-0------' mclr='-0------')
    bit (names='- CLKROE - - - - - -' width='1 1 1 1 1 1 1 1')
sfr (key=NCO1ACC addr=0x27 size=3 flags=j)
sfr (key=NCO1ACCL addr=0x27 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='NCO1ACC7 NCO1ACC6 NCO1ACC5 NCO1ACC4 NCO1ACC3 NCO1ACC2 NCO1ACC1 NCO1ACC0' width='1 1 1 1 1 1 1 1')
sfr (key=NCO1ACCH addr=0x28 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='NCO1ACC15 NCO1ACC14 NCO1ACC13 NCO1ACC12 NCO1ACC11 NCO1ACC10 NCO1ACC9 NCO1ACC8' width='1 1 1 1 1 1 1 1')
sfr (key=NCO1ACCU addr=0x29 size=1 access='u u u u rw rw rw rw')
    reset (por='----0000' mclr='----0000')
    bit (names='- - - - NCO1ACC19 NCO1ACC18 NCO1ACC17 NCO1ACC16' width='1 1 1 1 1 1 1 1')
sfr (key=NCO1INC addr=0x2a size=3 flags=j)
sfr (key=NCO1INCL addr=0x2a size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000001' mclr='00000001')
    bit (names='NCO1INC7 NCO1INC6 NCO1INC5 NCO1INC4 NCO1INC3 NCO1INC2 NCO1INC1 NCO1INC0' width='1 1 1 1 1 1 1 1')
sfr (key=NCO1INCH addr=0x2b size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='NCO1INC15 NCO1INC14 NCO1INC13 NCO1INC12 NCO1INC11 NCO1INC10 NCO1INC9 NCO1INC8' width='1 1 1 1 1 1 1 1')
sfr (key=NCO1INCU addr=0x2c size=1 access='u u u u u u u u')
    reset (por='--------' mclr='--------')
    bit (names='- - - - - - - -' width='1 1 1 1 1 1 1 1')
sfr (key=NCO1CON addr=0x2d size=1 access='rw rw r rw u u u rw')
    reset (por='0000---0' mclr='0000---0')
    bit (names='N1EN N1OE N1OUT N1POL - - - N1PFM' width='1 1 1 1 1 1 1 1')
sfr (key=NCO1CLK addr=0x2e size=1 access='rw rw rw u u u rw rw')
    reset (por='000---00' mclr='000---00')
    bit (names='N1PWS - N1CKS' width='3 1 4')
UnusedRegs (0x2f-0x2f)
sfr (key=WDTCON addr=0x30 size=1 access='u u rw rw rw rw rw rw')
    reset (por='--010110' mclr='--010110')
    bit (names='- - WDTPS SWDTEN' width='1 1 5 1')
sfr (key=CLC1CON addr=0x31 size=1 access='rw rw r rw rw rw rw rw')
    reset (por='00u00000' mclr='00u00000')
    bit (names='LC1EN LC1OE LC1OUT LC1INTP LC1INTN LC1MODE2 LC1MODE1 LC1MODE0' width='1 1 1 1 1 1 1 1')
sfr (key=CLC1SEL0 addr=0x32 size=1 access='u rw rw rw u rw rw rw')
    reset (por='-xxx-xxx' mclr='-uuu-uuu')
    bit (names='- LC1D2S2 LC1D2S1 LC1D2S0 - LC1D1S2 LC1D1S1 LC1D1S0' width='1 1 1 1 1 1 1 1')
sfr (key=CLC1SEL1 addr=0x33 size=1 access='u rw rw rw u rw rw rw')
    reset (por='-xxx-xxx' mclr='-uuu-uuu')
    bit (names='- LC1D4S2 LC1D4S1 LC1D4S0 - LC1D3S2 LC1D3S1 LC1D3S0' width='1 1 1 1 1 1 1 1')
sfr (key=CLC1POL addr=0x34 size=1 access='rw u u u rw rw rw rw')
    reset (por='0---0000' mclr='0---0000')
    bit (names='LC1POL - - - LC1G4POL LC1G3POL LC1G2POL LC1G1POL' width='1 1 1 1 1 1 1 1')
sfr (key=CLC1GLS0 addr=0x35 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='LC1G1D4T LC1G1D4N LC1G1D3T LC1G1D3N LC1G1D2T LC1G1D2N LC1G1D1T LC1G1D1N' width='1 1 1 1 1 1 1 1')
sfr (key=CLC1GLS1 addr=0x36 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='LC1G2D4T LC1G2D4N LC1G2D3T LC1G2D3N LC1G2D2T LC1G2D2N LC1G2D1T LC1G2D1N' width='1 1 1 1 1 1 1 1')
sfr (key=CLC1GLS2 addr=0x37 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='LC1G3D4T LC1G3D4N LC1G3D3T LC1G3D3N LC1G3D2T LC1G3D2N LC1G3D1T LC1G3D1N' width='1 1 1 1 1 1 1 1')
sfr (key=CLC1GLS3 addr=0x38 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='xxxxxxxx')
    bit (names='LC1G4D4T LC1G4D4N LC1G4D3T LC1G4D3N LC1G4D2T LC1G4D2N LC1G4D1T LC1G4D1N' width='1 1 1 1 1 1 1 1')
sfr (key=CWG1CON0 addr=0x39 size=1 access='rw rw rw rw rw u u rw')
    reset (por='00000--x' mclr='00000--x')
    bit (names='G1EN G1OEB G1OEA G1POLB G1POLA - - G1CS0' width='1 1 1 1 1 1 1 1')
sfr (key=CWG1CON1 addr=0x3a size=1 access='rw rw rw rw u u rw rw')
    reset (por='xxxx--xx' mclr='uuuu--xx')
    bit (names='G1ASDLB G1ASDLA - - G1IS1 G1IS0' width='2 2 1 1 1 1')
sfr (key=CWG1CON2 addr=0x3b size=1 access='rw rw u u u u rw rw')
    reset (por='xx----xx' mclr='uu----uu')
    bit (names='G1ASE G1ARSEN - - - - G1ASDSCLC1 G1ASDSFLT' width='1 1 1 1 1 1 1 1')
sfr (key=CWG1DBR addr=0x3c size=1 access='u u rw rw rw rw rw rw')
    reset (por='--xxxxxx' mclr='--uuuuuu')
    bit (names='- - CWG1DBR' width='1 1 6')
sfr (key=CWG1DBF addr=0x3d size=1 access='u u rw rw rw rw rw rw')
    reset (por='--xxxxxx' mclr='--uuuuuu')
    bit (names='- - CWG1DBF' width='1 1 6')
sfr (key=VREGCON addr=0x3e size=1 access='u u u u u u rw rw')
    reset (por='------00' mclr='------00')
    bit (names='- - - - - - VREGPM' width='1 1 1 1 1 1 2')
sfr (key=BORCON addr=0x3f size=1 access='rw rw u u u u u rw')
    reset (por='10-----q' mclr='uu-----u')
    bit (names='SBOREN BORFS - - - - - BORRDY' width='1 1 1 1 1 1 1 1')

######################################################################
#
# Non Memory-Mapped Registers
#
# (Conditionally visible SFRs appear as NMMRs in the "Special Function
# Registers" section.)
#
######################################################################

HasNMMR=1
nmmr (key=WREG addr=0x0 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
nmmr (key=STKPTR addr=0x1 size=1 flags=h access='rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
NMMRObjSize=2

######################################################################
#
# Configuration Registers
#
######################################################################

cfgbits (key=CONFIG addr=0x2007 unused=0x0)
    field (key=FOSC mask=0x1 desc="Oscillator Selection bits")
        setting (req=0x1 value=0x0 desc="INTOSC oscillator: CLKIN function disabled")
        setting (req=0x1 value=0x1 desc="EC: CLKIN function enabled")
    field (key=BOREN mask=0x6 desc="Brown-out Reset Enable")
        setting (req=0x6 value=0x6 desc="Enabled")
        setting (req=0x6 value=0x4 desc="Brown-out Reset enabled while running and disabled in Sleep")
        setting (req=0x6 value=0x2 desc="Brown-out Reset controlled by the SBOREN bit in the BORCON register")
        setting (req=0x6 value=0x0 desc="Disabled")
    field (key=WDTE mask=0x18 desc="Watchdog Timer Enable" min=1)
        setting (req=0x18 value=0x18 desc="Enabled")
        setting (req=0x18 value=0x10 desc="WDT enabled while running and disabled in Sleep")
        setting (req=0x18 value=0x8 desc="WDT controlled by the SWDTEN bit in the WDTCON register")
        setting (req=0x18 value=0x0 desc="Disabled")
    field (key=PWRTE mask=0x20 desc="Power-up Timer Enable bit")
        setting (req=0x20 value=0x20 desc="Disabled")
        setting (req=0x20 value=0x0 desc="Enabled")
    field (key=MCLRE mask=0x40 desc="MCLR Pin Function Select bit")
        setting (req=0x40 value=0x40 desc="Enabled")
        setting (req=0x40 value=0x0 desc="Disabled")
    field (key=CP mask=0x80 desc="Code Protection bit")
        setting (req=0x80 value=0x80 desc="Disabled")
            checksum (type=0x0 protregion=0x0-0x0)
        setting (req=0x80 value=0x0 desc="Enabled")
            checksum (type=0x27 protregion=0x0-0x1ff)
    field (key=LVP mask=0x100 desc="Low-Voltage Programming Enable")
        setting (req=0x100 value=0x100 desc="Enabled")
        setting (req=0x100 value=0x0 desc="Disabled")
    field (key=LPBOR mask=0x200 desc="Brown-out Reset Selection bits")
        setting (req=0x200 value=0x200 desc="Enabled")
        setting (req=0x200 value=0x0 desc="Disabled")
    field (key=BORV mask=0x400 desc="Brown-out Reset Voltage Selection")
        setting (req=0x400 value=0x400 desc="Brown-out Reset Voltage (Vbor), low trip point selected.")
        setting (req=0x400 value=0x0 desc="Brown-out Reset Voltage (Vbor), high trip point selected.")
    field (key=WRT mask=0x1800 desc="Flash Memory Self-Write Protection")
        setting (req=0x1800 value=0x1800 desc="Disabled")
        setting (req=0x1800 value=0x1000 desc="000h to 07Fh write protected, 080h to 1FFh may be modified by PMCON control")
        setting (req=0x1800 value=0x800 desc="000h to 0FFh write protected, 100h to 1FFh may be modified by PMCON control")
        setting (req=0x1800 value=0x0 desc="000h to 1FFh write protected, no addresses may be modified by PMCON control")
    field (key=DEBUG mask=0x2000 desc="In-Circuit Debugger Mode" flags=xh)
        setting (req=0x2000 value=0x2000 desc="Disabled")
        setting (req=0x2000 value=0x0 desc="Enabled")
