######################################################################
#
# MPLAB IDE .dev File Generated by `pic2dev.py'
#
# Device: PIC16F716
# Family: 16xxxx
# Datasheet: 41206
# Programming Spec: 40245
# Date: Tue Apr 30 09:41:16 2013
#
######################################################################


######################################################################
#
# Memory Regions & Other General Device Information
#
######################################################################

vpp (range=10.000-12.000 dflt=11.000)
vdd (range=2.000-5.500 dfltrange=4.000-5.500 nominal=5.000)
pgming (memtech=ee tries=1)
    wait (pgm=2000 eedata=2000 cfg=2000 userid=2000 erase=6000)
    latches (pgm=4 eedata=1 cfg=1 userid=4)
EraseAlg=1
HWStackDepth=8
breakpoints (numhwbp=1 datacapture=false idbyte=x)
testmem (region=0x2000-0x203f)
userid (region=0x2000-0x2003)
devid (region=0x2006-0x2006 idmask=0x3fe0 id=0x1140)
cfgmem (region=0x2007-0x2007)
bkbgvectmem (region=0x2004-0x2004)
pgmmem (region=0x0-0x7ff)
NumBanks=2
MirrorRegs (0xa-0xb 0x8a-0x8b)
MirrorRegs (0x2-0x4 0x82-0x84)
MirrorRegs (0x0-0x0 0x80-0x80)
MirrorRegs (0x70-0x7f 0xf0-0xff)
UnusedRegs (0xc0-0xef)

######################################################################
#
# Special Function Registers
#
######################################################################

sfr (key=INDF addr=0x0 size=1 flags=i access='u u u u u u u u')
    reset (por='--------' mclr='--------')
    bit (names='INDF' width='8')
sfr (key=TMR0 addr=0x1 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='TMR0' width='8')
    stimulus (scl=rwb pcfiles=w regfiles=w type=int)
sfr (key=PCL addr=0x2 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='PCL' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=STATUS addr=0x3 size=1 access='r r rw r r rw rw rw')
    reset (por='00011xxx' mclr='000qquuu')
    bit (names='IRP RP nTO nPD Z DC C' width='1 2 1 1 1 1 1')
sfr (key=FSR addr=0x4 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='FSR' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=w type=int)
sfr (key=PORTA addr=0x5 size=1 access='u u u rw rw rw rw rw')
    reset (por='---x0000' mclr='---u0000')
    bit (names='- - - RA4 RA3 RA2 RA1 RA0' width='1 1 1 1 1 1 1 1')
    bit (tag=scl names='RA' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=rw)
sfr (key=PORTB addr=0x6 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='RB7 RB6 RB5 RB4 RB3 RB2 RB1 RB0' width='1 1 1 1 1 1 1 1')
    bit (tag=scl names='RB' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=rw)
UnusedRegs (0x7-0x9)
sfr (key=PCLATH addr=0xa size=1 access='u u u rw rw rw rw rw')
    reset (por='---00000' mclr='---00000')
    bit (names='- - - PCLATH' width='1 1 1 5')
    stimulus (scl=rwb pcfiles=rw regfiles=w type=int)
sfr (key=INTCON addr=0xb size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='0000000x' mclr='0000000u')
    bit (names='GIE PEIE TMR0IE INTE RBIE TMR0IF INTF RBIF' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=PIR1 addr=0xc size=1 access='u rw u u u rw rw rw')
    reset (por='-0---000' mclr='-0---000')
    bit (names='- ADIF - - - CCP1IF TMR2IF TMR1IF' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
UnusedRegs (0xd-0xd)
sfr (key=TMR1 addr=0xe size=2 flags=j)
    bit (names='TMR1' width='16')
    stimulus (scl=rwb regfiles=w type=int)
sfr (key=TMR1L addr=0xe size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='TMR1L' width='8')
    stimulus (scl=rwb pcfiles=w regfiles=w type=int)
sfr (key=TMR1H addr=0xf size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='TMR1H' width='8')
    stimulus (scl=rwb pcfiles=w regfiles=w type=int)
sfr (key=T1CON addr=0x10 size=1 access='u u rw rw rw rw rw rw')
    reset (por='--000000' mclr='--uuuuuu')
    bit (names='- - T1CKPS T1OSCEN nT1SYNC TMR1CS TMR1ON' width='1 1 2 1 1 1 1')
    stimulus (scl=rwb regfiles=w)
sfr (key=TMR2 addr=0x11 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='TMR2' width='8')
    stimulus (scl=rwb pcfiles=w regfiles=w type=int)
sfr (key=T2CON addr=0x12 size=1 access='u rw rw rw rw rw rw rw')
    reset (por='-0000000' mclr='-0000000')
    bit (names='- TOUTPS TMR2ON T2CKPS' width='1 4 1 2')
    stimulus (scl=rwb regfiles=w)
UnusedRegs (0x13-0x14)
sfr (key=CCPR1 addr=0x15 size=2 flags=j)
    bit (names='CCPR1' width='16')
    stimulus (scl=rwb regfiles=w type=int)
sfr (key=CCPR1L addr=0x15 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='CCPR1L' width='8')
    stimulus (scl=rwb regfiles=w type=int)
sfr (key=CCPR1H addr=0x16 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='CCPR1H' width='8')
    stimulus (scl=rwb regfiles=w type=int)
sfr (key=CCP1CON addr=0x17 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='P1M DC1B CCP1M' width='2 2 4')
    stimulus (scl=rwb regfiles=w)
sfr (key=PWM1CON addr=0x18 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='PRSEN PDC' width='1 7')
    stimulus (scl=rwb)
sfr (key=ECCPAS addr=0x19 size=1 access='rw rw u rw rw rw rw rw')
    reset (por='00-00000' mclr='00-00000')
    bit (names='ECCPASE ECCPAS2 - ECCPAS0 PSSAC PSSBD' width='1 1 1 1 2 2')
    stimulus (scl=rwb)
UnusedRegs (0x1a-0x1d)
sfr (key=ADRES addr=0x1e size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='ADRES' width='8')
    stimulus (scl=rwb regfiles=r type=int)
sfr (key=ADCON0 addr=0x1f size=1 access='rw rw rw rw rw rw u rw')
    reset (por='000000-0' mclr='000000-0')
    bit (names='ADCS CHS GO/nDONE - ADON' width='2 3 1 1 1')
    bit (tag=scl names='ADCS CHS GO_nDONE - ADON' width='2 3 1 1 1')
    stimulus (scl=rwb regfiles=w)
sfr (key=OPTION_REG addr=0x81 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='11111111' mclr='11111111')
    bit (names='nRBPU INTEDG T0CS T0SE PSA PS' width='1 1 1 1 1 3')
    stimulus (scl=rwb regfiles=w)
sfr (key=TRISA addr=0x85 size=1 access='u u u rw rw rw rw rw')
    reset (por='---11111' mclr='---11111')
    bit (names='- - - TRISA4 TRISA3 TRISA2 TRISA1 TRISA0' width='1 1 1 1 1 1 1 1')
    bit (tag=scl names='TRISA' width='8')
    stimulus (scl=rwb regfiles=w)
sfr (key=TRISB addr=0x86 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='11111111' mclr='11111111')
    bit (names='TRISB7 TRISB6 TRISB5 TRISB4 TRISB3 TRISB2 TRISB1 TRISB0' width='1 1 1 1 1 1 1 1')
    bit (tag=scl names='TRISB' width='8')
    stimulus (scl=rwb regfiles=w)
UnusedRegs (0x87-0x89)
sfr (key=PIE1 addr=0x8c size=1 access='u rw u u u rw rw rw')
    reset (por='-0---000' mclr='-0---000')
    bit (names='- ADIE - - - CCP1IE TMR2IE TMR1IE' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
UnusedRegs (0x8d-0x8d)
sfr (key=PCON addr=0x8e size=1 access='u u u u u u rw rw')
    reset (por='------qq' mclr='------uu')
    bit (names='- - - - - - nPOR nBOR' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb regfiles=w)
UnusedRegs (0x8f-0x91)
sfr (key=PR2 addr=0x92 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='11111111' mclr='11111111')
    bit (names='PR2' width='8')
    stimulus (scl=rwb regfiles=w type=int)
UnusedRegs (0x93-0x9e)
sfr (key=ADCON1 addr=0x9f size=1 access='u u u u u rw rw rw')
    reset (por='-----000' mclr='-----000')
    bit (names='- - - - - PCFG' width='1 1 1 1 1 3')
    stimulus (scl=rwb regfiles=w)

######################################################################
#
# Non Memory-Mapped Registers
#
# (Conditionally visible SFRs appear as NMMRs in the "Special Function
# Registers" section.)
#
######################################################################

HasNMMR=1
nmmr (key=WREG addr=0x0 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
nmmr (key=STKPTR addr=0x1 size=1 flags=h access='rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
NMMRObjSize=2

######################################################################
#
# Configuration Registers
#
######################################################################

cfgbits (key=CONFIG addr=0x2007 unused=0xdf30)
    field (key=OSC mask=0x3 desc="Oscillator Selection bits")
        setting (req=0x3 value=0x3 desc="RC oscillator")
        setting (req=0x3 value=0x2 desc="HS oscillator")
        setting (req=0x3 value=0x1 desc="XT oscillator")
        setting (req=0x3 value=0x0 desc="LP oscillator")
    field (key=WDTE mask=0x4 desc="Watchdog Timer Enable bit")
        setting (req=0x4 value=0x4 desc="Enabled")
        setting (req=0x4 value=0x0 desc="Disabled")
    field (key=PWRTE mask=0x8 desc="Power-up Timer Enable bit")
        setting (req=0x8 value=0x8 desc="Disabled")
        setting (req=0x8 value=0x0 desc="Enabled")
    field (key=BODEN mask=0x40 desc="Brown-out Reset Enable bit")
        setting (req=0x40 value=0x40 desc="Enabled")
        setting (req=0x40 value=0x0 desc="Disabled")
    field (key=BODENV mask=0x80 desc="Brown-out Reset Voltage bit")
        setting (req=0x80 value=0x80 desc="VBOR set to 4.0V")
        setting (req=0x80 value=0x0 desc="VBOR set to 2.5V")
    field (key=CP mask=0x2000 desc="Code Protect")
        setting (req=0x2000 value=0x2000 desc="Disabled")
            checksum (type=0x0 protregion=0x0-0x0)
        setting (req=0x2000 value=0x0 desc="Enabled")
            checksum (type=0x20 protregion=0x0-0x7ff)
