######################################################################
#
# MPLAB IDE .dev File Generated by `pic2dev.py'
#
# Device: PIC10F200
# Family: 16c5x
# Datasheet: 41239
# Programming Spec: 41228
# Date: Tue Apr 30 09:40:04 2013
#
######################################################################


######################################################################
#
# Memory Regions & Other General Device Information
#
######################################################################

vpp (range=12.500-13.500 dflt=12.500)
vdd (range=2.000-5.500 dfltrange=3.000-5.500 nominal=5.000)
pgming (memtech=ee tries=1 lvpthresh=0)
    wait (pgm=3000 eedata=2000 cfg=2000 userid=2000 erase=10000 lvpgm=2000)
    latches (pgm=1 eedata=1 cfg=1 userid=1)
EraseAlg=1
HWStackDepth=2
breakpoints (numhwbp=1 datacapture=false idbyte=x)
calmem (region=0xff-0xff)
testmem (region=0x100-0x13f)
userid (region=0x100-0x103)
cfgmem (region=0xfff-0xfff)
pgmmem (region=0x0-0xff)
NumBanks=1
UnusedRegs (0x8-0xf)

######################################################################
#
# Special Function Registers
#
######################################################################

sfr (key=INDF addr=0x0 size=1 flags=i access='u u u u u u u u')
    reset (por='--------' mclr='--------')
    bit (names='INDF' width='8')
sfr (key=TMR0 addr=0x1 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='TMR0' width='8')
    stimulus (scl=rwb pcfiles=w regfiles=w type=int)
sfr (key=PCL addr=0x2 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='11111111' mclr='11111111')
    bit (names='PCL' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=STATUS addr=0x3 size=1 access='rw rw u r r rw rw rw')
    reset (por='0--11xxx' mclr='q--qquuu')
    bit (names='GPWUF - - nTO nPD Z DC C' width='1 1 1 1 1 1 1 1')
sfr (key=FSR addr=0x4 size=1 access='r r r rw rw rw rw rw')
    reset (por='111xxxxx' mclr='111uuuuu')
    bit (names='FSR' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=OSCCAL addr=0x5 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='11111110' mclr='uuuuuuuu')
    bit (names='CAL FOSC4' width='7 1')
sfr (key=GPIO addr=0x6 size=1 access='u u u u r rw rw rw')
    reset (por='----xxxx' mclr='----uuuu')
    bit (names='- - - - GP3 GP2 GP1 GP0' width='1 1 1 1 1 1 1 1')
    bit (tag=scl names='GP' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=rw)
UnusedRegs (0x7-0x7)

######################################################################
#
# Non Memory-Mapped Registers
#
# (Conditionally visible SFRs appear as NMMRs in the "Special Function
# Registers" section.)
#
######################################################################

HasNMMR=1
nmmr (key=WREG addr=0x0 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='qqqqqqqq' mclr='qqqqqqqq')
    bit (names='WREG' width='8')
nmmr (key=STKPTR addr=0x1 size=1 flags=h access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='STKPTR' width='8')
nmmr (key=TRISIO addr=0x3 size=1 access='u u u u rw rw rw rw')
    reset (por='----1111' mclr='----1111')
    bit (names='- - - - TRISIO3 TRISIO2 TRISIO1 TRISIO0' width='1 1 1 1 1 1 1 1')
nmmr (key=OPTION_REG addr=0x5 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='11111111' mclr='11111111')
    bit (names='nGPWU nGPPU T0CS T0SE PSA PS' width='1 1 1 1 1 3')
NMMRObjSize=4

######################################################################
#
# Configuration Registers
#
######################################################################

cfgbits (key=CONFIG addr=0xfff unused=0xfe3)
    field (key=OSC mask=0x1 desc="Oscillator" flags=xh)
        setting (req=0x1 value=0x1 desc="This is the only option. It is here for backward compatibility")
    field (key=WDTE mask=0x4 desc="Watchdog Timer")
        setting (req=0x4 value=0x4 desc="Enabled")
        setting (req=0x4 value=0x0 desc="Disabled")
    field (key=CP mask=0x8 desc="Code Protect")
        setting (req=0x8 value=0x8 desc="Disabled")
            checksum (type=0x0 protregion=0x0-0x0)
        setting (req=0x8 value=0x0 desc="Enabled")
            checksum (type=0x20 protregion=0x40-0xfe)
    field (key=MCLRE mask=0x10 desc="Master Clear Enable")
        setting (req=0x10 value=0x10 desc="Enabled")
        setting (req=0x10 value=0x0 desc="Disabled")
