######################################################################
#
# MPLAB IDE .dev File Generated by `pic2dev.py'
#
# Device: PIC16F873A
# Family: 16xxxx
# Datasheet: 39582
# Programming Spec: 39589
# Date: Tue Apr 30 09:41:23 2013
#
######################################################################


######################################################################
#
# Memory Regions & Other General Device Information
#
######################################################################

vpp (range=12.500-13.500 dflt=13.000)
vdd (range=2.500-5.500 dfltrange=4.500-5.500 nominal=5.000)
pgming (memtech=ee tries=1 lvpthresh=4.500)
    wait (pgm=1000 eedata=8000 cfg=8000 userid=8000 erase=8000 lvpgm=8000)
    latches (pgm=8 eedata=1 cfg=1 userid=4 rowerase=8)
EraseAlg=2
HWStackDepth=8
breakpoints (numhwbp=1 datacapture=false idbyte=x)
testmem (region=0x2000-0x20ff)
userid (region=0x2000-0x2003)
devid (region=0x2006-0x2006 idmask=0x3fe0 id=0xe40)
    ver (id=0xe40 desc="a0,a1")
    ver (id=0xe41 desc="b0")
    ver (id=0xe42 desc="b1")
    ver (id=0xe43 desc="b2")
    ver (id=0xe46 desc="b3")
    ver (id=0xe47 desc="b4")
cfgmem (region=0x2007-0x2007)
eedata (region=0x0-0x7f)
bkbgvectmem (region=0x2004-0x2004)
pgmmem (region=0x0-0xfff)
NumBanks=4
MirrorRegs (0x1-0x1 0x101-0x101)
MirrorRegs (0x6-0x6 0x106-0x106)
MirrorRegs (0xa-0xb 0x8a-0x8b 0x10a-0x10b 0x18a-0x18b)
MirrorRegs (0x81-0x81 0x181-0x181)
MirrorRegs (0x0-0x0 0x80-0x80 0x100-0x100 0x180-0x180)
MirrorRegs (0x2-0x4 0x82-0x84 0x102-0x104 0x182-0x184)
MirrorRegs (0x86-0x86 0x186-0x186)
MirrorRegs (0x20-0x7f 0x120-0x17f)
MirrorRegs (0xa0-0xff 0x1a0-0x1ff)
UnusedRegs (0x110-0x11f)
UnusedRegs (0x190-0x19f)

######################################################################
#
# Special Function Registers
#
######################################################################

sfr (key=INDF addr=0x0 size=1 flags=i access='u u u u u u u u')
    reset (por='--------' mclr='--------')
    bit (names='INDF' width='8')
sfr (key=TMR0 addr=0x1 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='TMR0' width='8')
    stimulus (scl=rwb pcfiles=w regfiles=w type=int)
sfr (key=PCL addr=0x2 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='PCL' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=STATUS addr=0x3 size=1 access='rw rw rw r r rw rw rw')
    reset (por='00011xxx' mclr='000qquuu')
    bit (names='IRP RP nTO nPD Z DC C' width='1 2 1 1 1 1 1')
sfr (key=FSR addr=0x4 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='FSR' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=w type=int)
sfr (key=PORTA addr=0x5 size=1 access='u u rw rw rw rw rw rw')
    reset (por='--0x0000' mclr='--0u0000')
    bit (names='- - RA5 RA4 RA3 RA2 RA1 RA0' width='1 1 1 1 1 1 1 1')
    bit (tag=scl names='RA' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=rw)
sfr (key=PORTB addr=0x6 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='RB7 RB6 RB5 RB4 RB3 RB2 RB1 RB0' width='1 1 1 1 1 1 1 1')
    bit (tag=scl names='RB' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=rw)
sfr (key=PORTC addr=0x7 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='RC7 RC6 RC5 RC4 RC3 RC2 RC1 RC0' width='1 1 1 1 1 1 1 1')
    bit (tag=scl names='RC' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=rw)
UnusedRegs (0x8-0x9)
sfr (key=PCLATH addr=0xa size=1 access='u u u rw rw rw rw rw')
    reset (por='---00000' mclr='---00000')
    bit (names='- - - PCLATH' width='1 1 1 5')
    stimulus (scl=rwb pcfiles=rw regfiles=w type=int)
sfr (key=INTCON addr=0xb size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='0000000x' mclr='0000000u')
    bit (names='GIE PEIE TMR0IE INTE RBIE TMR0IF INTF RBIF' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=PIR1 addr=0xc size=1 access='u rw r r rw rw rw rw')
    reset (por='-0000000' mclr='-0000000')
    bit (names='- ADIF RCIF TXIF SSPIF CCP1IF TMR2IF TMR1IF' width='1 1 1 1 1 1 1 1')
    bit (tag=scl names='- ADIF - - SSPIF CCP1IF TMR2IF TMR1IF' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=PIR2 addr=0xd size=1 access='u rw u rw rw u u rw')
    reset (por='-0-00--0' mclr='-0-00--0')
    bit (names='- CMIF - EEIF BCLIF - - CCP2IF' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=TMR1 addr=0xe size=2 flags=j)
    bit (names='TMR1' width='16')
    stimulus (scl=rwb regfiles=w type=int)
sfr (key=TMR1L addr=0xe size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='TMR1L' width='8')
    stimulus (scl=rwb pcfiles=w regfiles=w type=int)
sfr (key=TMR1H addr=0xf size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='TMR1H' width='8')
    stimulus (scl=rwb pcfiles=w regfiles=w type=int)
sfr (key=T1CON addr=0x10 size=1 access='u u rw rw rw rw rw rw')
    reset (por='--000000' mclr='--uuuuuu')
    bit (names='- - T1CKPS T1OSCEN nT1SYNC TMR1CS TMR1ON' width='1 1 2 1 1 1 1')
    stimulus (scl=rwb regfiles=w)
sfr (key=TMR2 addr=0x11 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='TMR2' width='8')
    stimulus (scl=rwb pcfiles=w regfiles=w type=int)
sfr (key=T2CON addr=0x12 size=1 access='u rw rw rw rw rw rw rw')
    reset (por='-0000000' mclr='-0000000')
    bit (names='- TOUTPS TMR2ON T2CKPS' width='1 4 1 2')
    stimulus (scl=rwb regfiles=w)
sfr (key=SSPBUF addr=0x13 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='SSPBUF' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=rw type=int)
sfr (key=SSPCON addr=0x14 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='WCOL SSPOV SSPEN CKP SSPM' width='1 1 1 1 4')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=CCPR1 addr=0x15 size=2 flags=j)
    bit (names='CCPR1' width='16')
    stimulus (scl=rwb regfiles=w type=int)
sfr (key=CCPR1L addr=0x15 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='CCPR1L' width='8')
    stimulus (scl=rwb regfiles=w type=int)
sfr (key=CCPR1H addr=0x16 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='CCPR1H' width='8')
    stimulus (scl=rwb regfiles=w type=int)
sfr (key=CCP1CON addr=0x17 size=1 access='u u rw rw rw rw rw rw')
    reset (por='--000000' mclr='--000000')
    bit (names='- - CCP1X CCP1Y CCP1M' width='1 1 1 1 4')
    stimulus (scl=rwb regfiles=w)
sfr (key=RCSTA addr=0x18 size=1 access='rw rw rw rw rw r r r')
    reset (por='0000000x' mclr='0000000x')
    bit (names='SPEN RX9 SREN CREN ADDEN FERR OERR RX9D' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb regfiles=w)
sfr (key=TXREG addr=0x19 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='TXREG' width='8')
    stimulus (scl=rwb regfiles=w)
sfr (key=RCREG addr=0x1a size=1 access='r r r r r r r r')
    reset (por='00000000' mclr='00000000')
    bit (names='RCREG' width='8')
    stimulus (scl=rb regfiles=rp)
sfr (key=CCPR2 addr=0x1b size=2 flags=j)
    bit (names='CCPR2' width='16')
    stimulus (scl=rwb regfiles=w type=int)
sfr (key=CCPR2L addr=0x1b size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='CCPR2L' width='8')
    stimulus (scl=rwb regfiles=w type=int)
sfr (key=CCPR2H addr=0x1c size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='CCPR2H' width='8')
    stimulus (scl=rwb regfiles=w type=int)
sfr (key=CCP2CON addr=0x1d size=1 access='u u rw rw rw rw rw rw')
    reset (por='--000000' mclr='--000000')
    bit (names='- - CCP2X CCP2Y CCP2M' width='1 1 1 1 4')
    stimulus (scl=rwb regfiles=w)
sfr (key=ADRESH addr=0x1e size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='ADRESH' width='8')
    stimulus (scl=rwb type=int)
sfr (key=ADCON0 addr=0x1f size=1 access='rw rw rw rw rw rw u rw')
    reset (por='000000-0' mclr='000000-0')
    bit (names='ADCS CHS GO/nDONE - ADON' width='2 3 1 1 1')
    bit (tag=scl names='ADCS CHS GO_nDONE - ADON' width='2 3 1 1 1')
    stimulus (scl=rwb regfiles=w)
sfr (key=OPTION_REG addr=0x81 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='11111111' mclr='11111111')
    bit (names='nRBPU INTEDG T0CS T0SE PSA PS' width='1 1 1 1 1 3')
    stimulus (scl=rwb regfiles=w)
sfr (key=TRISA addr=0x85 size=1 access='u u rw rw rw rw rw rw')
    reset (por='--111111' mclr='--111111')
    bit (names='- - TRISA5 TRISA4 TRISA3 TRISA2 TRISA1 TRISA0' width='1 1 1 1 1 1 1 1')
    bit (tag=scl names='TRISA' width='8')
    stimulus (scl=rwb regfiles=w)
sfr (key=TRISB addr=0x86 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='11111111' mclr='11111111')
    bit (names='TRISB7 TRISB6 TRISB5 TRISB4 TRISB3 TRISB2 TRISB1 TRISB0' width='1 1 1 1 1 1 1 1')
    bit (tag=scl names='TRISB' width='8')
    stimulus (scl=rwb regfiles=w)
sfr (key=TRISC addr=0x87 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='11111111' mclr='11111111')
    bit (names='TRISC7 TRISC6 TRISC5 TRISC4 TRISC3 TRISC2 TRISC1 TRISC0' width='1 1 1 1 1 1 1 1')
    bit (tag=scl names='TRISC' width='8')
    stimulus (scl=rwb regfiles=w)
UnusedRegs (0x88-0x89)
sfr (key=PIE1 addr=0x8c size=1 access='u rw rw rw rw rw rw rw')
    reset (por='-0000000' mclr='-0000000')
    bit (names='- ADIE RCIE TXIE SSPIE CCP1IE TMR2IE TMR1IE' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=PIE2 addr=0x8d size=1 access='u rw u rw rw u u rw')
    reset (por='-0-00--0' mclr='-0-00--0')
    bit (names='- CMIE - EEIE BCLIE - - CCP2IE' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=PCON addr=0x8e size=1 access='u u u u u u rw rw')
    reset (por='------qq' mclr='------uu')
    bit (names='- - - - - - nPOR nBOR' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb regfiles=w)
UnusedRegs (0x8f-0x90)
sfr (key=SSPCON2 addr=0x91 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='GCEN ACKSTAT ACKDT ACKEN RCEN PEN RSEN SEN' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=PR2 addr=0x92 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='11111111' mclr='11111111')
    bit (names='PR2' width='8')
    stimulus (scl=rwb regfiles=w type=int)
sfr (key=SSPADD addr=0x93 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='SSPADD' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=w type=int)
sfr (key=SSPSTAT addr=0x94 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='SMP CKE D/nA P S R/nW UA BF' width='1 1 1 1 1 1 1 1')
    bit (tag=scl names='SMP CKE D_nA P S R_nW UA BF' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=rw)
UnusedRegs (0x95-0x97)
sfr (key=TXSTA addr=0x98 size=1 access='rw rw rw rw u rw r rw')
    reset (por='0000-010' mclr='0000-010')
    bit (names='CSRC TX9 TXEN SYNC - BRGH TRMT TX9D' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb regfiles=w)
sfr (key=SPBRG addr=0x99 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
    bit (names='SPBRG' width='8')
    stimulus (scl=rwb regfiles=w)
UnusedRegs (0x9a-0x9b)
sfr (key=CMCON addr=0x9c size=1 access='r r rw rw rw rw rw rw')
    reset (por='00000111' mclr='00000111')
    bit (names='C2OUT C1OUT C2INV C1INV CIS CM' width='1 1 1 1 1 3')
    stimulus (scl=rwb regfiles=w)
sfr (key=CVRCON addr=0x9d size=1 access='rw rw rw u rw rw rw rw')
    reset (por='000-0000' mclr='000-0000')
    bit (names='CVREN CVROE CVRR - CVR' width='1 1 1 1 4')
    stimulus (scl=rwb regfiles=w)
sfr (key=ADRESL addr=0x9e size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='ADRESL' width='8')
    stimulus (scl=rwb regfiles=r type=int)
sfr (key=ADCON1 addr=0x9f size=1 access='rw rw u u rw rw rw rw')
    reset (por='00--0000' mclr='00--0000')
    bit (names='ADFM ADCS2 - - PCFG' width='1 1 1 1 4')
    stimulus (scl=rwb regfiles=w)
UnusedRegs (0x105-0x105)
UnusedRegs (0x107-0x109)
sfr (key=EEDATA addr=0x10c size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='EEDATA' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=rw)
sfr (key=EEADR addr=0x10d size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='xxxxxxxx' mclr='uuuuuuuu')
    bit (names='EEADR' width='8')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=EEDATH addr=0x10e size=1 access='u u rw rw rw rw rw rw')
    reset (por='--xxxxxx' mclr='--uuuuuu')
    bit (names='- - EEDATH' width='1 1 6')
    stimulus (scl=rwb pcfiles=rw regfiles=rw)
sfr (key=EEADRH addr=0x10f size=1 access='u u u u rw rw rw rw')
    reset (por='----xxxx' mclr='----uuuu')
    bit (names='- - - - EEADRH' width='1 1 1 1 4')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
UnusedRegs (0x185-0x185)
UnusedRegs (0x187-0x189)
sfr (key=EECON1 addr=0x18c size=1 access='rw u u u rw rw rs rs')
    reset (por='x---x000' mclr='u---u000')
    bit (names='EEPGD - - - WRERR WREN WR RD' width='1 1 1 1 1 1 1 1')
    stimulus (scl=rwb pcfiles=rw regfiles=w)
sfr (key=EECON2 addr=0x18d size=1 access='w w w w w w w w')
    reset (por='--------' mclr='--------')
    bit (names='EECON2' width='8')
UnusedRegs (0x18e-0x18f)

######################################################################
#
# Non Memory-Mapped Registers
#
# (Conditionally visible SFRs appear as NMMRs in the "Special Function
# Registers" section.)
#
######################################################################

HasNMMR=1
nmmr (key=WREG addr=0x0 size=1 access='rw rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
nmmr (key=STKPTR addr=0x1 size=1 flags=h access='rw rw rw rw rw rw rw')
    reset (por='00000000' mclr='00000000')
NMMRObjSize=2

######################################################################
#
# Configuration Registers
#
######################################################################

cfgbits (key=CONFIG addr=0x2007 unused=0x1030)
    field (key=FOSC mask=0x3 desc="Oscillator Selection bits")
        setting (req=0x3 value=0x3 desc="RC oscillator")
        setting (req=0x3 value=0x2 desc="HS oscillator")
        setting (req=0x3 value=0x1 desc="XT oscillator")
        setting (req=0x3 value=0x0 desc="LP oscillator")
    field (key=WDTE mask=0x4 desc="Watchdog Timer Enable bit")
        setting (req=0x4 value=0x4 desc="Enabled")
        setting (req=0x4 value=0x0 desc="Disabled")
    field (key=PWRTE mask=0x8 desc="Power-up Timer Enable bit")
        setting (req=0x8 value=0x8 desc="Disabled")
        setting (req=0x8 value=0x0 desc="Enabled")
    field (key=BOREN mask=0x40 desc="Brown-out Reset Enable bit")
        setting (req=0x40 value=0x40 desc="Enabled")
        setting (req=0x40 value=0x0 desc="Disabled")
    field (key=LVP mask=0x80 desc="Low-Voltage (Single-Supply) In-Circuit Serial Programming Enable bit")
        setting (req=0x80 value=0x80 desc="Enabled")
        setting (req=0x80 value=0x0 desc="Disabled")
    field (key=CPD mask=0x100 desc="Data EEPROM Memory Code Protection bit")
        setting (req=0x100 value=0x100 desc="Disabled")
        setting (req=0x100 value=0x0 desc="Enabled")
    field (key=WRT mask=0x600 desc="Flash Program Memory Write Enable bits")
        setting (req=0x600 value=0x600 desc="Disabled")
        setting (req=0x600 value=0x400 desc="0000h to 00FFh write-protected; 0100h to 0FFFh may be written to by EECON control")
        setting (req=0x600 value=0x200 desc="0000h to 03FFh write-protected; 0400h to 0FFFh may be written to by EECON control")
        setting (req=0x600 value=0x0 desc="0000h to 07FFh write-protected; 0800h to 0FFFh may be written to by EECON control")
    field (key=DEBUG mask=0x800 desc="In-Circuit Debugger Mode bit" flags=h)
        setting (req=0x800 value=0x800 desc="Disabled")
        setting (req=0x800 value=0x0 desc="Enabled")
    field (key=CP mask=0x2000 desc="Flash Program Memory Code Protection bit")
        setting (req=0x2000 value=0x2000 desc="Disabled")
            checksum (type=0x0 protregion=0x0-0x0)
        setting (req=0x2000 value=0x0 desc="Enabled")
            checksum (type=0x20 protregion=0x0-0xfff)
